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2021-05-26cpu: Move CPUClass::write_elf* to SysemuCPUOpsPhilippe Mathieu-Daudé
The write_elf*() handlers are used to dump vmcore images. This feature is only meaningful for system emulation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-19-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOpsPhilippe Mathieu-Daudé
VirtIO devices are only meaningful with system emulation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-17-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Move CPUClass::vmsd to SysemuCPUOpsPhilippe Mathieu-Daudé
Migration is specific to system emulation. - Move the CPUClass::vmsd field to SysemuCPUOps, - restrict VMSTATE_CPU() macro to sysemu, - vmstate_dummy is now unused, remove it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-16-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé
Introduce a structure to hold handler specific to sysemu. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-15-f4bug@amsat.org> [rth: Squash "restrict hw/core/sysemu-cpu-ops.h" patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé
Quoting Peter Maydell [*]: There are two ways to handle migration for a CPU object: (1) like any other device, so it has a dc->vmsd that covers migration for the whole object. As usual for objects that are a subclass of a parent that has state, the first entry in the VMStateDescription field list is VMSTATE_CPU(), which migrates the cpu_common fields, followed by whatever the CPU's own migration fields are. (2) a backwards-compatible mechanism for CPUs that were originally migrated using manual "write fields to the migration stream structures". The on-the-wire migration format for those is based on the 'env' pointer (which isn't a QOM object), and the cpu_common part of the migration data is elsewhere. cpu_exec_realizefn() handles both possibilities: * for type 1, dc->vmsd is set and cc->vmsd is not, so cpu_exec_realizefn() does nothing, and the standard "register dc->vmsd for a device" code does everything needed * for type 2, dc->vmsd is NULL and so we register the vmstate_cpu_common directly to handle the cpu-common fields, and the cc->vmsd to handle the per-CPU stuff You can't change a CPU from one type to the other without breaking migration compatibility, which is why some guest architectures are stuck on the cc->vmsd form. New targets should use dc->vmsd. To avoid new targets to start using type (2), rename cc->vmsd as cc->legacy_vmsd. The correct field to implement is dc->vmsd (the DeviceClass one). See also commit b170fce3dd0 ("cpu: Register VMStateDescription through CPUState") for historic background. [*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg800849.html Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210517105140.1062037-13-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-19target/ppc: Remove type argument for mmubooke206_get_physical_addressRichard Henderson
It is no longer used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-16-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from mmubooke206_check_tlbRichard Henderson
We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-15-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from mmubooke_get_physical_addressRichard Henderson
It is no longer used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-14-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from mmubooke_check_tlbRichard Henderson
We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-13-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from mmu40x_get_physical_addressRichard Henderson
It is no longer used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-12-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from get_bat_6xx_tlbRichard Henderson
We can now use MMU_INST_FETCH from access_type for this. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-11-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from ppc6xx_tlb_checkRichard Henderson
We can now use MMU_INST_FETCH from access_type for this. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-10-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from ppc6xx_tlb_pte_checkRichard Henderson
It is no longer used. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-9-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove type argument from check_protRichard Henderson
We can now use MMU_INST_FETCH from access_type for this. Use prot_for_access_type to simplify everything. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-8-richard.henderson@linaro.org> [dwg: Remove a stray trailing whitespace] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Use MMUAccessType in mmu_helper.cRichard Henderson
This replaces 'int rw' with 'MMUAccessType access_type'. Comparisons vs zero become either MMU_DATA_LOAD or MMU_DATA_STORE, since we had previously squashed rw to 0 for code access. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-7-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Rename access_type to type in mmu_helper.cRichard Henderson
The variable that holds ACCESS_INT, ACCESS_FLOAT, etc is variously called 'int type' or 'int access_type' within this file. Standardize on 'int type' throughout. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-6-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Use MMUAccessType in mmu-hash32.cRichard Henderson
We must leave the 'int rwx' parameter to ppc_hash32_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-5-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Use MMUAccessType in mmu-hash64.cRichard Henderson
We must leave the 'int rwx' parameter to ppc_hash64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Ricgard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-4-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Use MMUAccessType in mmu-radix64.cRichard Henderson
We must leave the 'int rwx' parameter to ppc_radix64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-3-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Introduce prot_for_access_typeRichard Henderson
Use this in the three places we currently have a local array indexed by rwx (which happens to have the same values). The types will match up correctly with additional changes. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-2-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Fix load endianness for lxvwsx/lxvdsxGiuseppe Musacchio
TARGET_WORDS_BIGENDIAN may not match the machine endianness if that's a runtime-configurable parameter. Fixes: bcb0b7b1a1c05707304f80ca6f523d557816f85c Fixes: afae37d98ae991c0792c867dbd9f32f988044318 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/212 Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Message-Id: <20210518133020.58927-1-thatlemon@gmail.com> Tested-by: Paul A. Clarke <pc@us.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Use translator_loop_temp_checkRichard Henderson
The special logging is unnecessary. It will have been done immediately before in the log file. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210517205025.3777947-9-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Mark helper_raise_exception* as noreturnRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-8-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Tidy exception vs exit_tbRichard Henderson
We do not need to emit an exit_tb after an exception, as the latter will exit via longjmp. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Move single-step check to ppc_tr_tb_stopRichard Henderson
When single-stepping, force max_insns to 1 in init_disas so that we exit the translation loop immediately. Combine the single-step checks in tb_stop, and give the gdb exception priority over the cpu exception, just as we already do in gen_lookup_and_goto_ptr. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-6-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove DisasContext.exceptionRichard Henderson
Now that we have removed all of the fake exceptions, and all real exceptions exit via DISAS_NORETURN, we can remove this field. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-5-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURNRichard Henderson
The translation of branch instructions always results in exit from the TB. Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATERichard Henderson
Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-3-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Introduce gen_icount_io_startRichard Henderson
Create a function to handle the details for interacting with icount. Force the exit from the tb via DISAS_TOO_MANY, which allows chaining to the next tb, where the code emitted for gen_tb_start() will determine if we must exit. We can thus remove any matching conditional call to gen_stop_exception. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-2-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove unnecessary gen_io_end callsRichard Henderson
Since ba3e7926691ed33, we switched the implementation of icount to always reset can_do_io at the start of the following TB. Most of them were removed in 9e9b10c64911, but some were missed. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-10-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXITRichard Henderson
Remove the synthetic "exception" after no more uses. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-9-matheus.ferst@eldorado.org.br> Reviewed-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE}Richard Henderson
Rewrite ppc_tr_tb_stop to handle these new codes. Convert ctx->exception into these new codes at the end of ppc_tr_translate_insn, prior to pushing the change back throughout translate.c. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-8-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Simplify gen_debug_exceptionRichard Henderson
Two of the call sites that use gen_debug_exception have already updated NIP. Only ppc_tr_breakpoint_check requires the update. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove special case for POWERPC_EXCP_TRAPRichard Henderson
Since POWERPC_EXCP_TRAP is raised by gen_exception_err, we will have also set DISAS_NORETURN. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-6-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Remove special case for POWERPC_SYSCALLRichard Henderson
Since POWERPC_SYSCALL is raised by gen_exception_err, we will have also set DISAS_NORETURN. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-5-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Move DISAS_NORETURN setting into gen_exception*Richard Henderson
There are other valid settings for is_jmp besides DISAS_NEXT and DISAS_NORETURN, so eliminating that dichotomy from ppc_tr_translate_insn is helpful. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Split out decode_legacyRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-3-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Add cia field to DisasContextRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-2-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: moved ppc_cpu_dump_state to cpu_init.cBruno Larsen (billionai)
This function was forgotten in the cpu_init code motion series, but it seems to be used regardless of TCG, and so needs to be moved to support disabling TCG. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-4-bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: moved ppc_store_sdr1 to cpu.cBruno Larsen (billionai)
Moved this function that is required in !TCG cases into a common code file Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-3-bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [dwg: Fixed compile error with linux-user targets] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: updated vscr manipulation in machine.cBruno Larsen (billionai)
Updated the code in machine.c to use the generic ppc_{store,get}_vscr instead of helper style functions, so it can build without TCG Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-7-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: created ppc_{store,get}_vscr for generic vscr usageBruno Larsen (billionai)
Some functions unrelated to TCG use helper_m{t,f}vscr, so generic versions of those functions were added to cpu.c, in preparation for compilation without TCG Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-2-bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: isolated cpu init from translation logicBruno Larsen (billionai)
finished isolation of CPU initialization logic from translation logic. CPU initialization now only has common code and may or may not call accelerator-specific code, as the build options require. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20210507115551.11436-1-bruno.larsen@eldorado.org.br> [dwg: Fix compile error with clang linux-user builds] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: turned SPR R/W callbacks not staticBruno Larsen (billionai)
To be able to compile translate_init.c.inc as a standalone file, we have to make the callbacks accessible outside of translate.c; This patch does exactly that Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210507115512.11376-1-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19hw/ppc: moved has_spr to cpu.hLucas Mateus Castro (alqotel)
Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function. Change spr verification in pnv.c and spapr.c to a version that can compile in a !TCG environment. Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210507164146.67086-1-lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: moved ppc_store_lpcr to misc_helper.cLucas Mateus Castro (alqotel)
Moved the function ppc_store from mmu-hash64.c to misc_helper.c and the prototype from mmu-hash64.h to cpu.h as it is a more appropriate place, but it will have to have its implementation moved to a new file as misc_helper.c should not be compiled in a !TCG environment. Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-4-lucas.araujo@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: moved function out of mmu-hash64Lucas Mateus Castro (alqotel)
The function ppc_hash64_filter_pagesizes has been moved from a function with prototype in mmu-hash64.h and implemented in mmu-hash64.c to a static function in hw/ppc/spapr_caps.c as it's only used in that file. Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-3-lucas.araujo@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: move SPR R/W callbacks to translate.cBruno Larsen (billionai)
Moved all read and write callbacks for SPRs away from translate_init.c.inc and into translate.c; these functions are TCG only, so this motion is required to enable building with the flag disable-tcg Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210506190837.6921-1-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: renamed SPR registration functionsBruno Larsen (billionai)
Renamed all gen_spr_* and gen_* functions specifically related to registering SPRs to register_*_sprs and register_*, to avoid future confusion with other TCG related code. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210505155310.62710-2-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19target/ppc: Fold gen_*_xer into their callersBruno Larsen (billionai)
folded gen_{read,write}_xer into their only callers, spr_{read,write}_xer Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210504140157.76066-2-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 21:35:52 +0000