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path: root/target/ppc/translate/vmx-impl.inc.c
AgeCommit message (Expand)Author
2019-10-24target/ppc: Fix for optimized vsl/vsr instructionsStefan Brankovic
2019-08-29target/ppc: Refactor emulation of vmrgew and vmrgow instructionsStefan Brankovic
2019-08-21target/ppc: Optimize emulation of vclzw instructionStefan Brankovic
2019-08-21target/ppc: Optimize emulation of vclzd instructionStefan Brankovic
2019-08-21target/ppc: Optimize emulation of vgbbd instructionStefan Brankovic
2019-08-21target/ppc: Optimize emulation of vsl and vsr instructionsStefan Brankovic
2019-08-21target/ppc: Optimize emulation of lvsl and lvsr instructionsStefan Brankovic
2019-05-29target/ppc: Use vector variable shifts for VSL, VSR, VSRARichard Henderson
2019-05-13tcg: Specify optional vector requirements with a listRichard Henderson
2019-04-26target/ppc: Style fixes for translate/vmx-impl.inc.cDavid Gibson
2019-03-12target/ppc: improve avr64_offset() and use it to simplify get_avr64()/set_avr...Mark Cave-Ayland
2019-03-12target/ppc: introduce avr_full_offset() functionMark Cave-Ayland
2019-02-18target/ppc: convert vmin* and vmax* to vector operationsRichard Henderson
2019-02-18target/ppc: convert vadd*s and vsub*s to vector operationsRichard Henderson
2019-02-18target/ppc: Add helper_mfvscrRichard Henderson
2019-02-18target/ppc: Pass integer to helper_mtvscrRichard Henderson
2019-02-18target/ppc: convert vsplt[bhw] to use vector operationsRichard Henderson
2019-02-18target/ppc: convert vspltis[bhw] to use vector operationsRichard Henderson
2019-02-18target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector oper...Mark Cave-Ayland
2019-02-18target/ppc: convert VMX logical instructions to use vector operationsMark Cave-Ayland
2019-01-09target/ppc: move FP and VMX registers into aligned vsr register arrayMark Cave-Ayland
2019-01-09target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register ac...Mark Cave-Ayland
2017-01-31ppc: Implement bcdutrunc. instructionJose Ricardo Ziviani
2017-01-31ppc: Implement bcdtrunc. instructionJose Ricardo Ziviani
2017-01-31ppc: Implement bcdsr. instructionJose Ricardo Ziviani
2017-01-31ppc: Implement bcdus. instructionJose Ricardo Ziviani
2017-01-31ppc: Implement bcds. instructionJose Ricardo Ziviani
2017-01-31target-ppc: add vextu[bhw][lr]x instructionsAvinesh Kumar
2017-01-31target-ppc: Implement bcdsetsgn. instructionJose Ricardo Ziviani
2017-01-31target-ppc: Implement bcdcpsgn. instructionJose Ricardo Ziviani
2017-01-31target-ppc: Implement bcdctsq. instructionJose Ricardo Ziviani
2017-01-31target-ppc: Implement bcdcfsq. instructionJose Ricardo Ziviani
2016-12-20Move target-* CPU file into a target/ folderThomas Huth