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AgeCommit message (Expand)Author
2022-09-04target/openrisc: Add interrupted CPU to logStafford Horne
2022-09-04target/openrisc: Fix memory reading in debuggerStafford Horne
2022-05-15Merge tag 'or1k-pull-request-20220515' of https://github.com/stffrdhrn/qemu i...Richard Henderson
2022-05-15target/openrisc: Do not reset delay slot flag on early tb exitStafford Horne
2022-05-11Normalize header guard symbol definitionMarkus Armbruster
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé
2022-03-06target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé
2022-02-21exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé
2022-01-28Remove unnecessary minimum_version_id_old fieldsPeter Maydell
2021-11-02target/openrisc: Make openrisc_cpu_tlb_fill sysemu onlyRichard Henderson
2021-10-15target/openrisc: Drop checks for singlestep_enabledRichard Henderson
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson
2021-09-14target/openrisc: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson
2021-07-13target/openrisc: Use dc->zero in gen_add, gen_addcRichard Henderson
2021-07-13target/openrisc: Cache constant 0 in DisasContextRichard Henderson
2021-07-13target/openrisc: Use tcg_constant_tl for dc->R0Richard Henderson
2021-07-13target/openrisc: Use tcg_constant_*Richard Henderson
2021-07-12Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell
2021-07-09target/openrisc: Use translator_use_goto_tbRichard Henderson
2021-07-09tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé
2021-07-09meson: Introduce target-specific KconfigPhilippe Mathieu-Daudé
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson
2021-05-26cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé
2021-05-02Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth
2021-04-01target/openrisc: fix icount handling for timer instructionsPavel Dovgalyuk
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana
2021-02-05cpu: move cc->do_interrupt to tcg_opsClaudio Fontana
2021-02-05cpu: Move tlb_fill to tcg_opsEduardo Habkost
2021-02-05cpu: Move cpu_exec_* to tcg_opsEduardo Habkost
2021-02-05cpu: Introduce TCGCpuOperations structEduardo Habkost
2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster
2020-12-15target/openrisc: Move pic_cpu code into CPU object properPeter Maydell
2020-11-17target/openrisc: Remove dead code attempting to check "is timer disabled"Peter Maydell
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2020-08-21meson: targetPaolo Bonzini
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini
2020-05-19softfloat: Name compare relation enumRichard Henderson
2020-03-19Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell
2020-03-17cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell
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