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AgeCommit message (Expand)Author
2020-12-15target/openrisc: Move pic_cpu code into CPU object properPeter Maydell
2020-11-17target/openrisc: Remove dead code attempting to check "is timer disabled"Peter Maydell
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2020-08-21meson: targetPaolo Bonzini
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini
2020-05-19softfloat: Name compare relation enumRichard Henderson
2020-03-19Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell
2020-03-17cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée
2020-01-24cpu: Use cpu_class_set_parent_reset()Greg Kurz
2020-01-17Merge remote-tracking branch 'remotes/rth/tags/pull-or1k-20200116' into stagingPeter Maydell
2020-01-16target/openrisc: Fix FPCSR mask to allow setting DZFStafford Horne
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé
2019-10-28target/openrisc: fetch code with translator_ldEmilio G. Cota
2019-09-04target/openrisc: Update cpu "any" to v1.3Richard Henderson
2019-09-04target/openrisc: Implement l.adrpRichard Henderson
2019-09-04target/openrisc: Implement move to/from FPCSRRichard Henderson
2019-09-04target/openrisc: Implement unordered fp comparisonsRichard Henderson
2019-09-04target/openrisc: Add support for ORFPX64A32Richard Henderson
2019-09-04target/openrisc: Check CPUCFG_OF32S for float insnsRichard Henderson
2019-09-04target/openrisc: Fix lf.ftoi.sRichard Henderson
2019-09-04target/openrisc: Add VR2 and AVR special processor registersRichard Henderson
2019-09-04target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu initRichard Henderson
2019-09-04target/openrisc: Make VR and PPC read-onlyRichard Henderson
2019-09-04target/openrisc: Cache R0 in DisasContextRichard Henderson
2019-09-04target/openrisc: Replace cpu register array with a functionRichard Henderson
2019-09-04target/openrisc: Add DisasContext parameter to check_r0_writeRichard Henderson
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen
2019-08-21hw/core: Move cpu.c, cpu.h from qom/ to hw/core/Markus Armbruster
2019-08-16Include hw/boards.h a bit lessMarkus Armbruster
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster
2019-08-16migration: Move the VMStateDescription typedef to typedefs.hMarkus Armbruster
2019-07-05general: Replace global smp variables with smp machine propertiesLike Xu
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-06-10cpu: Remove CPU_COMMONRichard Henderson
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson
2019-06-10cpu: Introduce cpu_set_cpustate_pointersRichard Henderson
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson
2019-06-10target/openrisc: Use env_cpu, env_archcpuRichard Henderson
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
2019-06-10cpu: Define ArchCPURichard Henderson
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson
2019-05-10target/openrisc: Convert to CPUClass::tlb_fillRichard Henderson
2019-05-08target/openrisc: Fix LGPL information in the file headersThomas Huth
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson