| Age | Commit message (Expand) | Author |
|---|
| 2019-09-04 | target/openrisc: Implement move to/from FPCSR | Richard Henderson |
| 2019-09-04 | target/openrisc: Add VR2 and AVR special processor registers | Richard Henderson |
| 2019-09-04 | target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init | Richard Henderson |
| 2019-09-04 | target/openrisc: Make VR and PPC read-only | Richard Henderson |
| 2019-07-05 | general: Replace global smp variables with smp machine properties | Like Xu |
| 2019-06-10 | target/openrisc: Use env_cpu, env_archcpu | Richard Henderson |
| 2019-01-30 | target/openrisc: Fix LGPL version number | Thomas Huth |
| 2018-07-03 | target/openrisc: Fix writes to interrupt mask register | Stafford Horne |
| 2018-07-03 | target/openrisc: Use identical sizes for ITLB and DTLB | Richard Henderson |
| 2018-07-03 | target/openrisc: Fix cpu_mmu_index | Richard Henderson |
| 2018-07-03 | target/openrisc: Fix tlb flushing in mtspr | Richard Henderson |
| 2018-07-03 | target/openrisc: Reduce tlb to a single dimension | Richard Henderson |
| 2018-07-03 | target/openrisc: Remove indirect function calls for mmu | Richard Henderson |
| 2018-07-03 | target/openrisc: Merge tlb allocation into CPUOpenRISCState | Richard Henderson |
| 2018-07-03 | target/openrisc: Form the spr index from tcg | Richard Henderson |
| 2018-07-02 | target/openrisc: Fix mtspr shadow gprs | Richard Henderson |
| 2018-04-11 | icount: fix cpu_restore_state_from_tb for non-tb-exit cases | Pavel Dovgalyuk |
| 2017-10-21 | openrisc/cputimer: Perparation for Multicore | Stafford Horne |
| 2017-10-21 | target/openrisc: Make coreid and numcores variable | Stafford Horne |
| 2017-05-04 | target/openrisc: Support non-busy idle state using PMR SPR | Stafford Horne |
| 2017-05-04 | target/openrisc: implement shadow registers | Stafford Horne |
| 2017-05-04 | target/openrisc: add numcores and coreid support | Stafford Horne |
| 2017-04-21 | target/openrisc: Implement EVBAR register | Tim 'mithro' Ansell |
| 2017-02-14 | target/openrisc: Tidy handling of delayed branches | Richard Henderson |
| 2017-02-14 | target/openrisc: Tidy ppc/npc implementation | Richard Henderson |
| 2017-02-14 | target/openrisc: Represent MACHI:MACLO as a single unit | Richard Henderson |
| 2017-02-14 | target/openrisc: Keep SR_F in a separate variable | Richard Henderson |
| 2017-01-13 | cputlb: drop flush_global flag from tlb_flush | Alex Bennée |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |
