Age | Commit message (Expand) | Author |
---|---|---|
2018-07-03 | target/openrisc: Remove indirect function calls for mmu | Richard Henderson |
2018-07-03 | target/openrisc: Merge tlb allocation into CPUOpenRISCState | Richard Henderson |
2017-10-21 | openrisc/cputimer: Perparation for Multicore | Stafford Horne |
2017-05-04 | target/openrisc: Support non-busy idle state using PMR SPR | Stafford Horne |
2017-05-04 | target/openrisc: Implement full vmstate serialization | Stafford Horne |
2017-05-04 | target/openrisc: implement shadow registers | Stafford Horne |
2017-02-14 | target/openrisc: Tidy ppc/npc implementation | Richard Henderson |
2017-02-14 | target/openrisc: Represent MACHI:MACLO as a single unit | Richard Henderson |
2017-02-14 | target/openrisc: Keep SR_F in a separate variable | Richard Henderson |
2017-02-14 | target/openrisc: Implement lwa, swa | Richard Henderson |
2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |