aboutsummaryrefslogtreecommitdiff
path: root/target/openrisc/machine.c
AgeCommit message (Expand)Author
2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster
2019-09-04target/openrisc: Implement move to/from FPCSRRichard Henderson
2019-08-16Include hw/boards.h a bit lessMarkus Armbruster
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-05-08target/openrisc: Fix LGPL information in the file headersThomas Huth
2018-11-27vmstate: constify VMStateFieldMarc-André Lureau
2018-07-03target/openrisc: Increase the TLB sizeRichard Henderson
2018-07-03target/openrisc: Use identical sizes for ITLB and DTLBRichard Henderson
2018-07-03target/openrisc: Reduce tlb to a single dimensionRichard Henderson
2018-07-03target/openrisc: Remove indirect function calls for mmuRichard Henderson
2018-07-03target/openrisc: Merge tlb allocation into CPUOpenRISCStateRichard Henderson
2017-10-21openrisc/cputimer: Perparation for MulticoreStafford Horne
2017-05-04target/openrisc: Support non-busy idle state using PMR SPRStafford Horne
2017-05-04target/openrisc: Implement full vmstate serializationStafford Horne
2017-05-04target/openrisc: implement shadow registersStafford Horne
2017-02-14target/openrisc: Tidy ppc/npc implementationRichard Henderson
2017-02-14target/openrisc: Represent MACHI:MACLO as a single unitRichard Henderson
2017-02-14target/openrisc: Keep SR_F in a separate variableRichard Henderson
2017-02-14target/openrisc: Implement lwa, swaRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth