Age | Commit message (Expand) | Author |
2019-06-12 | Include qemu-common.h exactly where needed | Markus Armbruster |
2019-05-08 | target/openrisc: Fix LGPL information in the file headers | Thomas Huth |
2018-07-03 | target/openrisc: Fix delay slot exception flag to match spec | Stafford Horne |
2018-07-03 | target/openrisc: Fix cpu_mmu_index | Richard Henderson |
2018-07-03 | target/openrisc: Remove indirect function calls for mmu | Richard Henderson |
2018-07-03 | target/openrisc: Merge tlb allocation into CPUOpenRISCState | Richard Henderson |
2018-07-03 | target/openrisc: Log interrupts | Richard Henderson |
2017-05-04 | target/openrisc: Support non-busy idle state using PMR SPR | Stafford Horne |
2017-04-21 | target/openrisc: Implement EPH bit | Tim 'mithro' Ansell |
2017-04-21 | target/openrisc: Implement EVBAR register | Tim 'mithro' Ansell |
2017-02-14 | target/openrisc: Tidy handling of delayed branches | Richard Henderson |
2017-02-14 | target/openrisc: Keep SR_F in a separate variable | Richard Henderson |
2017-02-14 | target/openrisc: Implement lwa, swa | Richard Henderson |
2017-02-14 | target/openrisc: Fix exception handling status registers | Stafford Horne |
2017-01-13 | cputlb: drop flush_global flag from tlb_flush | Alex Bennée |
2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |