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QEMU is a generic and open source machine & userspace emulator and virtualizer
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openrisc
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cpu.h
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Author
2017-05-04
target/openrisc: Support non-busy idle state using PMR SPR
Stafford Horne
2017-05-04
target/openrisc: Remove duplicate features property
Stafford Horne
2017-05-04
target/openrisc: implement shadow registers
Stafford Horne
2017-04-21
target/openrisc: Implement EVBAR register
Tim 'mithro' Ansell
2017-02-14
target/openrisc: Optimize for r0 being zero
Richard Henderson
2017-02-14
target/openrisc: Tidy handling of delayed branches
Richard Henderson
2017-02-14
target/openrisc: Tidy ppc/npc implementation
Richard Henderson
2017-02-14
target/openrisc: Fix madd
Richard Henderson
2017-02-14
target/openrisc: Represent MACHI:MACLO as a single unit
Richard Henderson
2017-02-14
target/openrisc: Keep SR_CY and SR_OV in a separate variables
Richard Henderson
2017-02-14
target/openrisc: Keep SR_F in a separate variable
Richard Henderson
2017-02-14
target/openrisc: Put SR[OVE] in TB flags
Richard Henderson
2017-02-14
target/openrisc: Implement lwa, swa
Richard Henderson
2017-02-14
target/openrisc: Rename the cpu from or32 to or1k
Richard Henderson
2017-01-13
qom/cpu: move tlb_flush to cpu_common_reset
Alex Bennée
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth