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QEMU is a generic and open source machine & userspace emulator and virtualizer
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openrisc
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cpu.h
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2020-09-18
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
Eduardo Habkost
2020-09-09
Use OBJECT_DECLARE_TYPE where possible
Eduardo Habkost
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
2020-03-19
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...
Peter Maydell
2020-03-17
cpu: Use DeviceClass reset instead of a special CPUClass reset
Peter Maydell
2020-03-17
gdbstub: extend GByteArray to read register helpers
Alex Bennée
2019-09-04
target/openrisc: Implement move to/from FPCSR
Richard Henderson
2019-09-04
target/openrisc: Add VR2 and AVR special processor registers
Richard Henderson
2019-09-04
target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init
Richard Henderson
2019-09-04
target/openrisc: Make VR and PPC read-only
Richard Henderson
2019-08-21
hw/core: Move cpu.c, cpu.h from qom/ to hw/core/
Markus Armbruster
2019-08-16
migration: Move the VMStateDescription typedef to typedefs.h
Markus Armbruster
2019-06-12
Include qemu-common.h exactly where needed
Markus Armbruster
2019-06-10
cpu: Remove CPU_COMMON
Richard Henderson
2019-06-10
cpu: Introduce CPUNegativeOffsetState
Richard Henderson
2019-06-10
cpu: Move ENV_OFFSET to exec/gen-icount.h
Richard Henderson
2019-06-10
target/openrisc: Use env_cpu, env_archcpu
Richard Henderson
2019-06-10
cpu: Replace ENV_GET_CPU with env_cpu
Richard Henderson
2019-06-10
cpu: Define ArchCPU
Richard Henderson
2019-06-10
cpu: Define CPUArchState with typedef
Richard Henderson
2019-06-10
tcg: Split out target/arch/cpu-param.h
Richard Henderson
2019-05-10
target/openrisc: Convert to CPUClass::tlb_fill
Richard Henderson
2019-05-08
target/openrisc: Fix LGPL information in the file headers
Thomas Huth
2019-04-18
qom/cpu: Simplify how CPUClass:cpu_dump_state() prints
Markus Armbruster
2019-04-18
target: Simplify how the TARGET_cpu_list() print
Markus Armbruster
2018-07-03
target/openrisc: Reorg tlb lookup
Richard Henderson
2018-07-03
target/openrisc: Increase the TLB size
Richard Henderson
2018-07-03
target/openrisc: Use identical sizes for ITLB and DTLB
Richard Henderson
2018-07-03
target/openrisc: Fix cpu_mmu_index
Richard Henderson
2018-07-03
target/openrisc: Reduce tlb to a single dimension
Richard Henderson
2018-07-03
target/openrisc: Remove indirect function calls for mmu
Richard Henderson
2018-07-03
target/openrisc: Merge tlb allocation into CPUOpenRISCState
Richard Henderson
2018-07-03
target/openrisc: Add print_insn_or1k
Richard Henderson
2018-03-19
cpu: get rid of unused cpu_init() defines
Igor Mammedov
2018-03-19
cpu: add CPU_RESOLVING_TYPE macro
Igor Mammedov
2018-02-21
target/*/cpu.h: remove softfloat.h
Alex Bennée
2018-01-25
accel/tcg: add size paremeter in tlb_fill()
Laurent Vivier
2017-10-27
openrisc: cleanup cpu type name composition
Igor Mammedov
2017-10-21
openrisc/cputimer: Perparation for Multicore
Stafford Horne
2017-09-01
openrisc: replace cpu_openrisc_init() with cpu_generic_init()
Igor Mammedov
2017-05-04
target/openrisc: Support non-busy idle state using PMR SPR
Stafford Horne
2017-05-04
target/openrisc: Remove duplicate features property
Stafford Horne
2017-05-04
target/openrisc: implement shadow registers
Stafford Horne
2017-04-21
target/openrisc: Implement EVBAR register
Tim 'mithro' Ansell
2017-02-14
target/openrisc: Optimize for r0 being zero
Richard Henderson
2017-02-14
target/openrisc: Tidy handling of delayed branches
Richard Henderson
2017-02-14
target/openrisc: Tidy ppc/npc implementation
Richard Henderson
2017-02-14
target/openrisc: Fix madd
Richard Henderson
2017-02-14
target/openrisc: Represent MACHI:MACLO as a single unit
Richard Henderson
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