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QEMU is a generic and open source machine & userspace emulator and virtualizer
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openrisc
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cpu.c
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Author
2021-09-14
target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu
Philippe Mathieu-Daudé
2021-05-26
hw/core: Constify TCGCPUOps
Richard Henderson
2021-05-26
cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps
Philippe Mathieu-Daudé
2021-05-26
cpu: Introduce SysemuCPUOps structure
Philippe Mathieu-Daudé
2021-02-05
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
Claudio Fontana
2021-02-05
cpu: move cc->do_interrupt to tcg_ops
Claudio Fontana
2021-02-05
cpu: Move tlb_fill to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Move cpu_exec_* to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Introduce TCGCpuOperations struct
Eduardo Habkost
2020-12-15
target/openrisc: Move pic_cpu code into CPU object proper
Peter Maydell
2020-03-17
cpu: Use DeviceClass reset instead of a special CPUClass reset
Peter Maydell
2020-01-24
cpu: Use cpu_class_set_parent_reset()
Greg Kurz
2019-09-04
target/openrisc: Update cpu "any" to v1.3
Richard Henderson
2019-09-04
target/openrisc: Implement move to/from FPCSR
Richard Henderson
2019-09-04
target/openrisc: Add support for ORFPX64A32
Richard Henderson
2019-09-04
target/openrisc: Check CPUCFG_OF32S for float insns
Richard Henderson
2019-09-04
target/openrisc: Add VR2 and AVR special processor registers
Richard Henderson
2019-09-04
target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init
Richard Henderson
2019-06-12
Include qemu-common.h exactly where needed
Markus Armbruster
2019-06-10
cpu: Introduce cpu_set_cpustate_pointers
Richard Henderson
2019-05-10
target/openrisc: Convert to CPUClass::tlb_fill
Richard Henderson
2019-04-18
target: Simplify how the TARGET_cpu_list() print
Markus Armbruster
2019-01-30
target/openrisc: Fix LGPL version number
Thomas Huth
2018-07-03
linux-user: Implement signals for openrisc
Richard Henderson
2018-07-03
target/openrisc: Increase the TLB size
Richard Henderson
2018-07-03
target/openrisc: Remove indirect function calls for mmu
Richard Henderson
2018-07-03
target/openrisc: Add print_insn_or1k
Richard Henderson
2018-06-01
target: Do not include "exec/exec-all.h" if it is not necessary
Philippe Mathieu-Daudé
2018-02-05
qdev: use device_class_set_parent_realize/unrealize/reset()
Philippe Mathieu-Daudé
2017-10-27
openrisc: cleanup cpu type name composition
Igor Mammedov
2017-10-24
qom: Introduce CPUClass.tcg_initialize
Richard Henderson
2017-10-21
openrisc/cputimer: Perparation for Multicore
Stafford Horne
2017-10-09
qom/cpu: move cpu_model null check to cpu_class_by_name()
Philippe Mathieu-Daudé
2017-09-01
openrisc: replace cpu_openrisc_init() with cpu_generic_init()
Igor Mammedov
2017-05-04
target/openrisc: Support non-busy idle state using PMR SPR
Stafford Horne
2017-05-04
target/openrisc: Remove duplicate features property
Stafford Horne
2017-05-04
target/openrisc: implement shadow registers
Stafford Horne
2017-04-21
target/openrisc: Implement EVBAR register
Tim 'mithro' Ansell
2017-02-14
target/openrisc: Implement lwa, swa
Richard Henderson
2017-01-13
qom/cpu: move tlb_flush to cpu_common_reset
Alex Bennée
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth