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2022-04-26target/nios2: Use tcg_gen_lookup_and_goto_ptrRichard Henderson
Use lookup_and_goto_ptr for indirect chaining between TBs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-52-richard.henderson@linaro.org>
2022-04-26target/nios2: Use gen_goto_tb for DISAS_TOO_MANYRichard Henderson
Depending on the reason for ending the TB, we can chain to the next TB because the PC is constant. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-51-richard.henderson@linaro.org>
2022-04-26target/nios2: Hoist set of is_jmp into gen_goto_tbRichard Henderson
Rather than force all callers to set this, do it within the subroutine. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-50-richard.henderson@linaro.org>
2022-04-26target/nios2: Create gen_jumprRichard Henderson
Split out a function to perform an indirect branch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-49-richard.henderson@linaro.org>
2022-04-26target/nios2: Enable unaligned traps for system modeRichard Henderson
Unaligned traps are optional, but required with an mmu. Turn them on always, because the fallback behaviour undefined. Enable alignment checks in the config file. Unwind the guest pc properly from do_unaligned_access. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-48-richard.henderson@linaro.org>
2022-04-26target/nios2: Drop CR_STATUS_EH from tb->flagsRichard Henderson
There's nothing about EH that affects translation, so there's no need to include it in tb->flags. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-47-richard.henderson@linaro.org>
2022-04-26target/nios2: Introduce dest_gprRichard Henderson
Constrain all references to cpu_R[] to load_gpr and dest_gpr. This will be required for supporting shadow register sets. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-46-richard.henderson@linaro.org>
2022-04-26target/nios2: Split out helpers for gen_rr_shiftRichard Henderson
Do as little work as possible within the macro. Split out helper functions and pass in arguments instead. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-26target/nios2: Split out helpers for gen_rr_mul_highRichard Henderson
Rename the macro from gen_r_mul, because these are the multiply variants that produce a high-part result. Do as little work as possible within the macro; split out helper functions and pass in arguments instead. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-26target/nios2: Split out helpers for gen_r_math_logicRichard Henderson
Split the macro in two, one for reg/imm and one for reg/reg. Do as little work as possible within the macros; split out helper functions and pass in arguments instead. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-26target/nios2: Split out helpers for gen_i_math_logicRichard Henderson
Do as little work as possible within the macro. Split out helper functions and pass in arguments instead. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-26target/nios2: Split out helpers for gen_i_cmpxxRichard Henderson
Do as little work as possible within the macro. Split out helper functions and pass in arguments instead. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-26target/nios2: Split out named structs for [IRJ]_TYPERichard Henderson
Currently the structures are anonymous within the macro. Pull them out to standalone types. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-44-richard.henderson@linaro.org>
2022-04-26target/nios2: Use tcg_constant_tlRichard Henderson
Replace current uses of tcg_const_tl, and remove the frees. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-43-richard.henderson@linaro.org>
2022-04-26target/nios2: Support division error exceptionRichard Henderson
Division may (optionally) raise a division exception. Since the linux kernel has been prepared for this for some time, enable it by default. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-42-richard.henderson@linaro.org>
2022-04-26target/nios2: Remove CPU_INTERRUPT_NMIRichard Henderson
This interrupt bit is never set, so testing it in nios2_cpu_has_work is pointless. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-41-richard.henderson@linaro.org>
2022-04-26target/nios2: Implement CR_STATUS.RSIERichard Henderson
Without EIC, this bit is RES1. So set the bit at reset, and add it to the readonly fields of CR_STATUS. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-40-richard.henderson@linaro.org>
2022-04-26target/nios2: Implement cpuidRichard Henderson
Copy the existing cpu_index into the space reserved for CR_CPUID. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-39-richard.henderson@linaro.org>
2022-04-26target/nios2: Prevent writes to read-only or reserved control fieldsRichard Henderson
Create an array of masks which detail the writable and readonly bits for each control register. Apply them when writing to control registers, including the write to status during eret. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-38-richard.henderson@linaro.org>
2022-04-26target/nios2: Clean up handling of tlbmisc in do_exceptionRichard Henderson
The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any exception with EH=0, or so says Table 42 (Processor Status After Taking Exception). We currently do not set PERM or BAD at all, and only set/clear DBL for tlb miss, and do not clear DBL for any other exception. It is a bit confusing to set D in tlb_fill and the rest during do_interrupt, so move the setting of D to do_interrupt as well. To do this, split EXP_TLBD into two cases, EXCP_TLB_X and EXCP_TLB_D, which allows us to distinguish them during do_interrupt. Choose a value for EXCP_TLB_D such that when truncated it produces the correct value for exception.CAUSE. Rename EXCP_TLB[RWX] to EXCP_PERM_[RWX], to emphasize that the exception is permissions related. Rename EXCP_SUPER[AD] to EXCP_SUPERA_[DX] to emphasize that they are both "supervisor address" exceptions, data and execute. Retain the setting of tlbmisc.WE for the fast-tlb-miss path, as it is being relied upon, but remove it from the permission path. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-37-richard.henderson@linaro.org>
2022-04-26target/nios2: Cleanup set of CR_EXCEPTION for do_interruptRichard Henderson
The register is entirely read-only for software, and we do not implement ECC, so we need not deposit the cause into an existing value; just create a new value from scratch. Furthermore, exception.CAUSE is not written for break exceptions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-36-richard.henderson@linaro.org>
2022-04-26target/nios2: Handle EXCP_UNALIGN and EXCP_UNALIGNDRichard Henderson
While some of the plumbing for misaligned data is present, in the form of nios2_cpu_do_unaligned_access, the hook will not be called because TARGET_ALIGNED_ONLY is not set in configs/targets/nios2-softmmu.mak. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-35-richard.henderson@linaro.org>
2022-04-26target/nios2: Hoist CPU_LOG_INT loggingRichard Henderson
Performing this early means that we can merge more cases within the non-logging switch statement. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-34-richard.henderson@linaro.org>
2022-04-26target/nios2: Clean up nios2_cpu_do_interruptRichard Henderson
Split out do_exception and do_iic_irq to handle bulk of the interrupt and exception processing. Parameterize the changes required to cpu state. The status.EH bit, which protects some data against double-faults, is only present with the MMU. Several exception cases did not check for status.EH being set, as required. The status.IH bit, which had been set by EXCP_IRQ, is exclusive to the external interrupt controller, which we do not yet implement. The internal interrupt controller, when the MMU is also present, sets the status.EH bit. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-33-richard.henderson@linaro.org>
2022-04-26target/nios2: Create EXCP_SEMIHOST for semi-hostingRichard Henderson
Decode 'break 1' during translation, rather than doing it again during exception processing. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-32-richard.henderson@linaro.org>
2022-04-26target/nios2: Move R_FOO and CR_BAR into enumerationsRichard Henderson
These symbols become available to the debugger. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-31-richard.henderson@linaro.org>
2022-04-26target/nios2: Use hw/registerfields.h for CR_TLBMISC fieldsRichard Henderson
Use FIELD_EX32 and FIELD_DP32 instead of managing the masking by hand. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-30-richard.henderson@linaro.org>
2022-04-26target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WERichard Henderson
WE is the architectural name of the field, not WR. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-29-richard.henderson@linaro.org>
2022-04-26target/nios2: Use hw/registerfields.h for CR_TLBACC fieldsRichard Henderson
Retain the helper macros for single bit fields as aliases to the longer R_*_MASK names. Use FIELD_EX32 and FIELD_DP32 instead of manually manipulating the fields. Since we're rewriting the references to CR_TLBACC_IGN_* anyway, we correct the name of this field to IG, which is its name in the official CPU documentation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-28-richard.henderson@linaro.org>
2022-04-26target/nios2: Use hw/registerfields.h for CR_TLBADDR fieldsRichard Henderson
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation of the fields. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-27-richard.henderson@linaro.org>
2022-04-26target/nios2: Use hw/registerfields.h for CR_EXCEPTION fieldsRichard Henderson
Use FIELD_DP32 instead of manual shifting and masking. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-26-richard.henderson@linaro.org>
2022-04-26target/nios2: Use hw/registerfields.h for CR_STATUS fieldsRichard Henderson
Add all fields; retain the helper macros for single bit fields. So far there are no uses of the multi-bit status fields. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-25-richard.henderson@linaro.org>
2022-04-26target/nios2: Clean up nios2_cpu_dump_stateRichard Henderson
Do not print control registers for user-only mode. Rename reserved control registers to "resN", where N is the control register index. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-24-richard.henderson@linaro.org>
2022-04-26target/nios2: Split control registers away from general registersRichard Henderson
Place the control registers into their own array, env->ctrl[]. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-23-richard.henderson@linaro.org>
2022-04-26target/nios2: Remove cpu_interrupts_enabledRichard Henderson
This function is unused. The real computation of this value is located in nios2_cpu_exec_interrupt. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-22-richard.henderson@linaro.org>
2022-04-26target/nios2: Do not create TCGv for control registersRichard Henderson
We don't need to reference them often, and when we do it is just as easy to load/store from cpu_env directly. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-20-richard.henderson@linaro.org>
2022-04-26target/nios2: Fix BRET instructionRichard Henderson
We had failed to copy BSTATUS back to STATUS, and diagnose supervisor-only. The spec is light on the specifics of the implementation of bret, but it is an easy assumption that the restore into STATUS should work the same as eret. Therefore, reuse the existing helper_eret. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-19-richard.henderson@linaro.org>
2022-04-26target/nios2: Split out helper for eret instructionAmir Gonnen
The implementation of eret will become much more complex with the introduction of shadow registers. [rth: Split out of a larger patch for shadow register sets. Directly exit to the cpu loop from the helper.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai> Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-18-richard.henderson@linaro.org>
2022-04-26target/nios2: Split PC out of env->regs[]Richard Henderson
It is cleaner to have a separate name for this variable. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-17-richard.henderson@linaro.org>
2022-04-26target/nios2: Add NUM_GP_REGS and NUM_CP_REGSAmir Gonnen
Split NUM_CORE_REGS into components that can be used elsewhere. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai> Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai> [rth: Split out of a larger patch for shadow register sets.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-16-richard.henderson@linaro.org>
2022-04-26target/nios2: Stop generating code if gen_check_supervisor failsRichard Henderson
Whether the cpu is in user-mode or not is something that we know at translation-time. We do not need to generate code after having raised an exception. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-15-richard.henderson@linaro.org>
2022-04-26target/nios2: Check supervisor on eretAmir Gonnen
eret instruction is only allowed in supervisor mode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai> Message-Id: <20220303153906.2024748-2-amir.gonnen@neuroblade.ai> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-14-richard.henderson@linaro.org>
2022-04-26target/nios2: Build helper.c for system onlyRichard Henderson
Remove the #ifdef !defined(CONFIG_USER_ONLY) that surrounds the whole file, and move helper.c to nios2_softmmu_ss. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-12-richard.henderson@linaro.org>
2022-04-26target/nios2: Remove nios2_cpu_record_sigsegvRichard Henderson
Since f5ef0e518d0, we have a real page mapped for kuser, which means the special casing for SIGSEGV can go away. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-11-richard.henderson@linaro.org>
2022-04-26target/nios2: Remove user-only nios2_cpu_do_interruptRichard Henderson
Since 78271684719, this function is unused for user-only, when the TCGCPUOps.do_interrupt hook itself became system-only. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-10-richard.henderson@linaro.org>
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau
G_NORETURN was introduced in glib 2.68, fallback to G_GNUC_NORETURN in glib-compat. Note that this attribute must be placed before the function declaration (bringing a bit of consistency in qemu codebase usage). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20220420132624.2439741-20-marcandre.lureau@redhat.com>
2022-04-20target/nios2: Remove log_cpu_state from resetRichard Henderson
This is redundant with the logging done in cpu_common_reset. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220417183019.755276-16-richard.henderson@linaro.org>
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson
We have fetched and locked the logfile in translator_loop. Pass the filepointer down to the disas_log hook so that it need not be fetched and locked again. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220417183019.755276-13-richard.henderson@linaro.org>
2022-04-06Remove qemu-common.h include from most unitsMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-33-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-04-06Replace qemu_gettimeofday() with g_get_real_time()Marc-André Lureau
GLib g_get_real_time() is an alternative to gettimeofday() which allows to simplify our code. For semihosting, a few bits are lost on POSIX host, but this shouldn't be a big concern. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220307070401.171986-5-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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