Age | Commit message (Expand) | Author |
2021-03-13 | target/mips/meson: Introduce mips_tcg source set | Philippe Mathieu-Daudé |
2021-03-11 | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul... | Peter Maydell |
2021-03-11 | Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda... | Peter Maydell |
2021-03-10 | semihosting: Move include/hw/semihosting/ -> include/semihosting/ | Philippe Mathieu-Daudé |
2021-03-09 | sysemu: Let VMChangeStateHandler take boolean 'running' argument | Philippe Mathieu-Daudé |
2021-03-08 | clock: Add ClockEvent parameter to callbacks | Peter Maydell |
2021-02-21 | target/mips: Use GPR move functions in gen_HILO1_tx79() | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Rename 128-bit upper halve GPR registers | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Promote 128-bit multimedia registers as global ones | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Make cpu_HI/LO registers public | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Include missing "tcg/tcg.h" header | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Remove unused 'rw' argument from page_table_walk_refill() | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Let get_seg*_physical_address() take MMUAccessType arg | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Let get_physical_address() take MMUAccessType argument | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Let raise_mmu_exception() take MMUAccessType argument | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Let cpu_mips_translate_address() take MMUAccessType arg | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Let do_translate_address() take MMUAccessType argument | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Replace magic value by MMU_DATA_LOAD definition | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Remove unused MMU definitions | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Remove access_type argument from get_physical_address() | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Remove access_type arg from get_segctl_physical_address() | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Remove access_type argument from get_seg_physical_address | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: Remove access_type argument from map_address() handler | Philippe Mathieu-Daudé |
2021-02-21 | target/mips: fetch code with translator_ld | Philippe Mathieu-Daudé |
2021-02-18 | target/mips: Create mips_io_recompile_replay_branch | Richard Henderson |
2021-02-16 | sev/i386: Don't allow a system reset under an SEV-ES guest | Tom Lendacky |
2021-02-05 | cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass | Claudio Fontana |
2021-02-05 | cpu: move do_unaligned_access to tcg_ops | Claudio Fontana |
2021-02-05 | cpu: move cc->transaction_failed to tcg_ops | Claudio Fontana |
2021-02-05 | cpu: move cc->do_interrupt to tcg_ops | Claudio Fontana |
2021-02-05 | cpu: Move tlb_fill to tcg_ops | Eduardo Habkost |
2021-02-05 | cpu: Move cpu_exec_* to tcg_ops | Eduardo Habkost |
2021-02-05 | cpu: Move synchronize_from_tb() to tcg_ops | Eduardo Habkost |
2021-02-05 | cpu: Introduce TCGCpuOperations struct | Eduardo Habkost |
2021-01-14 | target/mips: Remove vendor specific CPU definitions | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Remove CPU_NANOMIPS32 definition | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Remove CPU_R5900 definition | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 LL/SC opcodes to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 LLD/SCD opcodes to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 COP1X opcode to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Convert Rel6 Special2 opcode to decodetree | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Remove now unreachable LSA/DLSA opcodes code | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes | Philippe Mathieu-Daudé |
2021-01-14 | target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes | Philippe Mathieu-Daudé |