slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2021-02-21	target/mips: Use GPR move functions in gen_HILO1_tx79()	Philippe Mathieu-Daudé
2021-02-21	target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers	Philippe Mathieu-Daudé
2021-02-21	target/mips: Rename 128-bit upper halve GPR registers	Philippe Mathieu-Daudé
2021-02-21	target/mips: Promote 128-bit multimedia registers as global ones	Philippe Mathieu-Daudé
2021-02-21	target/mips: Make cpu_HI/LO registers public	Philippe Mathieu-Daudé
2021-02-21	target/mips: fetch code with translator_ld	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 LL/SC opcodes to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 LLD/SCD opcodes to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 COP1X opcode to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Convert Rel6 Special2 opcode to decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Remove now unreachable LSA/DLSA opcodes code	Philippe Mathieu-Daudé
2021-01-14	target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes	Philippe Mathieu-Daudé
2021-01-14	target/mips: Extract LSA/DLSA translation generators	Philippe Mathieu-Daudé
2021-01-14	target/mips: Use decode_ase_msa() generated from decodetree	Philippe Mathieu-Daudé
2021-01-14	target/mips: Extract MSA translation routines	Philippe Mathieu-Daudé
2021-01-14	target/mips: Declare gen_msa/_branch() in 'translate.h'	Philippe Mathieu-Daudé
2021-01-14	target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ()	Philippe Mathieu-Daudé
2021-01-14	target/mips: Remove CPUMIPSState* argument from gen_msa*() methods	Philippe Mathieu-Daudé
2021-01-14	target/mips: Extract msa_translate_init() from mips_tcg_init()	Philippe Mathieu-Daudé
2021-01-14	target/mips: Alias MSA vector registers on FPU scalar registers	Philippe Mathieu-Daudé
2021-01-14	target/mips: Simplify MSA TCG logic	Philippe Mathieu-Daudé
2021-01-14	target/mips: Introduce ase_msa_available() helper	Philippe Mathieu-Daudé
2021-01-14	target/mips/translate: Expose check_mips_64() to 32-bit mode	Philippe Mathieu-Daudé
2021-01-14	target/mips/translate: Extract decode_opc_legacy() from decode_opc()	Philippe Mathieu-Daudé
2021-01-14	target/mips: Extract FPU specific definitions to translate.h	Philippe Mathieu-Daudé
2021-01-14	target/mips: Declare generic FPU / Coprocessor functions in translate.h	Philippe Mathieu-Daudé
2021-01-14	target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction	Philippe Mathieu-Daudé
2021-01-14	target/mips: Replace gen_exception_err(err=0) by gen_exception_end()	Philippe Mathieu-Daudé
2021-01-14	target/mips/translate: Add declarations for generic code	Philippe Mathieu-Daudé
2021-01-14	target/mips/translate: Extract DisasContext structure	Philippe Mathieu-Daudé
2021-01-14	target/mips: Extract FPU helpers to 'fpu_helper.h'	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1	Philippe Mathieu-Daudé
2020-12-13	target/mips: Move cpu definitions, reset() and realize() to cpu.c	Philippe Mathieu-Daudé
2020-12-13	target/mips: Extract cpu_supports/cpu_set translate.c	Philippe Mathieu-Daudé
2020-12-13	target/mips: Introduce ase_mt_available() helper	Philippe Mathieu-Daudé
2020-12-13	target/mips: Remove mips_def_t unused argument from mvp_init()	Philippe Mathieu-Daudé
2020-12-13	target/mips: Remove unused headers from translate.c	Philippe Mathieu-Daudé
2020-12-13	hw/mips: Move address translation helpers to target/mips/	Philippe Mathieu-Daudé
2020-12-13	target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()	Philippe Mathieu-Daudé
2020-11-03	target/mips: Add unaligned access support for MIPS64R6 and Loongson-3	Huacai Chen