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path: root/target/mips/translate.c
AgeCommit message (Expand)Author
2017-07-20target/mips: Fix MIPS64 MFC0 UserLocal on BE hostJames Hogan
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-17target/mips: optimize WSBH, DSBH and DSHDAurelien Jarno
2017-07-11target/mips: fix msa copy_[s|u]_df rd = 0 corner caseMiodrag Dinic
2017-06-05target/mips: optimize indirect branchesAurelien Jarno
2017-06-05target/mips: optimize cross-page direct jumps in softmmuAurelien Jarno
2017-03-20target/mips: fix delay slot detection in gen_msa_branch()Yongbok Kim
2017-03-20target-mips: replace few LOG_DISAS() with trace pointsPhilippe Mathieu-Daudé
2017-03-20target-mips: replace break by goto cp0_unimplementedPhilippe Mathieu-Daudé
2017-03-20target-mips: log bad coprocessor0 register accesses with LOG_UNIMPPhilippe Mathieu-Daudé
2017-03-20target-mips: remove old & unuseful commentsPhilippe Mathieu-Daudé
2017-02-21target-mips: Provide function to test if a CPU supports an ISAPaul Burton
2017-01-10target-mips: Use clz opcodeRichard Henderson
2017-01-10target-mips: Use the new extract opRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth