slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2020-02-04	target/mips: Separate FPU-related helpers into their own file	Aleksandar Markovic
2020-02-04	target/mips: Separate CP0-related helpers into their own file	Aleksandar Markovic
2020-02-04	target/mips: Fix handling of LL/SC instructions after 7dd547e5ab	Alex Richardson
2020-01-29	target/mips: Add implementation of GINVT instruction	Yongbok Kim
2020-01-29	target/mips: Amend CP0 WatchHi register implementation	Yongbok Kim
2020-01-15	target/mips: Use cpu__mmuidx_ra instead of MMU_MODE_SUFFIX	Richard Henderson
2019-10-25	target/mips: Clean up op_helper.c	Aleksandar Markovic
2019-09-12	target/mips: Switch to do_transaction_failed() hook	Peter Maydell
2019-09-04	Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging	Peter Maydell
2019-09-03	mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well	David Hildenbrand
2019-09-03	target/mips: Hard code size with MO_{8\|16\|32\|64}	Tony Nguyen
2019-09-03	target/mips: Access MemoryRegion with MemOp	Tony Nguyen
2019-08-29	target/mips: Fix emulation of ST.W in system mode	Aleksandar Markovic
2019-08-19	target/mips: rationalise softfloat includes	Alex Bennée
2019-06-10	target/mips: Use env_cpu, env_archcpu	Richard Henderson
2019-05-26	target/mips: Fix MSA instructions ST.<B\|H\|W\|D> on big endian host	Mateja Marjanovic
2019-05-26	target/mips: Fix MSA instructions LD.<B\|H\|W\|D> on big endian host	Mateja Marjanovic
2019-05-10	target/mips: Convert to CPUClass::tlb_fill	Richard Henderson
2019-02-14	target/mips: hold BQL in mips_vpe_wake()	Goran Ferenc
2019-02-14	hw/mips_int: hold BQL for all interrupt requests	Aleksandar Markovic
2019-02-14	target/mips: reimplement SC instruction emulation and use cmpxchg	Leon Alrae
2019-02-14	target/mips: compare virtual addresses in LL/SC sequence	Leon Alrae
2019-01-18	target/mips: Update ITU to utilize SAARI and SAAR CP0 registers	Yongbok Kim
2019-01-18	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	Yongbok Kim
2018-10-18	target/mips: Implement hardware page table walker for MIPS32	Yongbok Kim
2018-10-18	target/mips: Add CP0 PWCtl register	Yongbok Kim
2018-10-18	target/mips: Add CP0 PWSize register	Yongbok Kim
2018-10-18	target/mips: Add CP0 PWField register	Yongbok Kim
2018-08-24	target/mips: Fix ERET/ERETNC behavior related to ADEL exception	Yongbok Kim
2018-08-24	target/mips: Implement emulation of nanoMIPS ROTX instruction	Matthew Fortune
2018-08-16	target/mips: Don't update BadVAddr register in Debug Mode	Yongbok Kim
2018-06-27	target/mips: Raise a RI when given fs is n/a from CTC1	Yongbok Kim
2018-05-17	target/mips: Remove floatX_maybe_silence_nan from conversions	Richard Henderson
2018-01-25	accel/tcg: add size paremeter in tlb_fill()	Laurent Vivier
2017-09-21	mips: introduce internal.h and cleanup cpu.h	Philippe Mathieu-Daudé
2017-08-02	target-mips: apply CP0.PageMask before writing into TLB entry	Leon Alrae
2017-07-20	target/mips: Add segmentation control registers	James Hogan
2017-07-20	target/mips: Add an MMU mode for ERL	James Hogan
2017-07-20	target/mips: Abstract mmu_idx from hflags	James Hogan
2017-07-20	target/mips: Add CP0_Ebase.WG (write gate) support	James Hogan
2017-07-20	target/mips: Weaken TLB flush on UX,SX,KX,ASID changes	James Hogan
2017-07-20	target/mips: Fix TLBWI shadow flush for EHINV,XI,RI	James Hogan
2017-03-09	target/mips: hold BQL for timer interrupts	Yongbok Kim
2017-01-13	cputlb: drop flush_global flag from tlb_flush	Alex Bennée
2017-01-10	target-mips: Use clz opcode	Richard Henderson
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth