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path: root/target/mips/machine.c
AgeCommit message (Expand)Author
2020-06-01target/mips: Add more CP0 register for save/restoreHuacai Chen
2020-01-29target/mips: Amend CP0 WatchHi register implementationYongbok Kim
2019-08-19target/mips: Style improvements in machine.cAleksandar Markovic
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-02-14target/mips: compare virtual addresses in LL/SC sequenceLeon Alrae
2019-01-18target/mips: Add CP0 register MemoryMapIDAleksandar Markovic
2019-01-18target/mips: Add fields for SAARI and SAAR CP0 registersYongbok Kim
2018-11-27vmstate: constify VMStateFieldMarc-André Lureau
2018-10-18target/mips: Add CP0 PWCtl registerYongbok Kim
2018-10-18target/mips: Add CP0 PWSize registerYongbok Kim
2018-10-18target/mips: Add CP0 PWField registerYongbok Kim
2018-10-18target/mips: Add CP0 PWBase registerYongbok Kim
2018-08-16target/mips: Add CP0 BadInstrX registerStefan Markovic
2017-09-21mips: introduce internal.h and cleanup cpu.hPhilippe Mathieu-Daudé
2017-07-20target/mips: Add segmentation control registersJames Hogan
2017-07-20target/mips: Add CP0_Ebase.WG (write gate) supportJames Hogan
2017-01-24migration: extend VMStateInfoJianjun Duan
2016-12-20Move target-* CPU file into a target/ folderThomas Huth