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QEMU is a generic and open source machine & userspace emulator and virtualizer
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cpu.h
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Author
2020-12-13
target/mips: Introduce ase_mt_available() helper
Philippe Mathieu-Daudé
2020-12-13
hw/mips: Move address translation helpers to target/mips/
Philippe Mathieu-Daudé
2020-12-13
target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument
Philippe Mathieu-Daudé
2020-12-13
target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
Philippe Mathieu-Daudé
2020-11-09
target/mips: Fix PageMask with variable page size
Jiaxun Yang
2020-10-17
target/mips/cpu: Introduce mips_cpu_create_with_clock() helper
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Allow the CPU to use dynamic frequencies
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Make cp0_count_rate a property
Philippe Mathieu-Daudé
2020-10-17
target/mips: Move cp0_count_ns to CPUMIPSState
Philippe Mathieu-Daudé
2020-06-09
target/mips: Add Loongson-3 CPU definition
Huacai Chen
2020-01-29
target/mips: Add implementation of GINVT instruction
Yongbok Kim
2020-01-29
target/mips: Amend CP0 WatchHi register implementation
Yongbok Kim
2020-01-15
target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX
Richard Henderson
2019-08-29
target/mips: Clean up handling of CP0 register 31
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 29
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 28
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 26
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 23
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 19
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 18
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 16
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 15
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 14
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 13
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 12
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 10
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 8
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 6
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 5
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 4
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 3
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 2
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 1
Aleksandar Markovic
2019-08-29
target/mips: Clean up handling of CP0 register 0
Aleksandar Markovic
2019-08-20
configure: Define target access alignment in configure
tony.nguyen@bt.com
2019-08-19
target/mips: rationalise softfloat includes
Alex Bennée
2019-06-12
Include qemu-common.h exactly where needed
Markus Armbruster
2019-06-10
cpu: Remove CPU_COMMON
Richard Henderson
2019-06-10
cpu: Introduce CPUNegativeOffsetState
Richard Henderson
2019-06-10
cpu: Move ENV_OFFSET to exec/gen-icount.h
Richard Henderson
2019-06-10
target/mips: Use env_cpu, env_archcpu
Richard Henderson
2019-06-10
cpu: Replace ENV_GET_CPU with env_cpu
Richard Henderson
2019-06-10
cpu: Define ArchCPU
Richard Henderson
2019-06-10
cpu: Define CPUArchState with typedef
Richard Henderson
2019-06-10
tcg: Split out target/arch/cpu-param.h
Richard Henderson
2019-05-26
target/mips: realign comments to fix checkpatch warnings
Jules Irenge
2019-05-26
target/mips: add or remove space to fix checkpatch errors
Jules Irenge
2019-04-18
target: Simplify how the TARGET_cpu_list() print
Markus Armbruster
2019-02-14
target/mips: introduce MTTCG-enabled builds
Aleksandar Markovic
2019-02-14
target/mips: reimplement SC instruction emulation and use cmpxchg
Leon Alrae
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