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path: root/target/mips/cpu.h
AgeCommit message (Expand)Author
2020-12-13target/mips: Introduce ase_mt_available() helperPhilippe Mathieu-Daudé
2020-12-13hw/mips: Move address translation helpers to target/mips/Philippe Mathieu-Daudé
2020-12-13target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argumentPhilippe Mathieu-Daudé
2020-12-13target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()Philippe Mathieu-Daudé
2020-11-09target/mips: Fix PageMask with variable page sizeJiaxun Yang
2020-10-17target/mips/cpu: Introduce mips_cpu_create_with_clock() helperPhilippe Mathieu-Daudé
2020-10-17target/mips/cpu: Allow the CPU to use dynamic frequenciesPhilippe Mathieu-Daudé
2020-10-17target/mips/cpu: Make cp0_count_rate a propertyPhilippe Mathieu-Daudé
2020-10-17target/mips: Move cp0_count_ns to CPUMIPSStatePhilippe Mathieu-Daudé
2020-06-09target/mips: Add Loongson-3 CPU definitionHuacai Chen
2020-01-29target/mips: Add implementation of GINVT instructionYongbok Kim
2020-01-29target/mips: Amend CP0 WatchHi register implementationYongbok Kim
2020-01-15target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIXRichard Henderson
2019-08-29target/mips: Clean up handling of CP0 register 31Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 29Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 28Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 26Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 23Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 19Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 18Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 16Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 15Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 14Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 13Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 12Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 10Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 8Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 6Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 5Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 4Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 3Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 2Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 1Aleksandar Markovic
2019-08-29target/mips: Clean up handling of CP0 register 0Aleksandar Markovic
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com
2019-08-19target/mips: rationalise softfloat includesAlex Bennée
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-06-10cpu: Remove CPU_COMMONRichard Henderson
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson
2019-06-10target/mips: Use env_cpu, env_archcpuRichard Henderson
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
2019-06-10cpu: Define ArchCPURichard Henderson
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson
2019-05-26target/mips: realign comments to fix checkpatch warningsJules Irenge
2019-05-26target/mips: add or remove space to fix checkpatch errorsJules Irenge
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster
2019-02-14target/mips: introduce MTTCG-enabled buildsAleksandar Markovic
2019-02-14target/mips: reimplement SC instruction emulation and use cmpxchgLeon Alrae