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AgeCommit message (Expand)Author
2023-09-20target/loongarch: Implement xvsadd/xvssubSong Gao
2023-09-20target/loongarch: Implement xvnegSong Gao
2023-09-20target/loongarch: Implement xvaddi/xvsubiSong Gao
2023-09-20target/loongarch: Implement xvreplgr2vrSong Gao
2023-09-20target/loongarch: Implement xvadd/xvsubSong Gao
2023-09-20target/loongarch: Add avail_LASX to check LASX instructionsSong Gao
2023-09-20target/loongarch: check_vec support check LASX instructionsSong Gao
2023-09-20target/loongarch: Add LASX data supportSong Gao
2023-09-20target/loongarch: Replace CHECK_SXE to check_vec(ctx, 16)Song Gao
2023-09-20target/loongarch: Use gen_helper_gvec_2i for 2OP + imm vector instructionsSong Gao
2023-09-20target/loongarch: Use gen_helper_gvec_2 for 2OP vector instructionsSong Gao
2023-09-20target/loongarch: Use gen_helper_gvec_2_ptr for 2OP + env vector instructionsSong Gao
2023-09-20target/loongarch: Use gen_helper_gvec_3 for 3OP vector instructionsSong Gao
2023-09-20target/loongarch: Use gen_helper_gvec_3_ptr for 3OP + env vector instructionsSong Gao
2023-09-20target/loongarch: Use gen_helper_gvec_4 for 4OP vector instructionsSong Gao
2023-09-20target/loongarch: Use gen_helper_gvec_4_ptr for 4OP + env vector instructionsSong Gao
2023-09-20target/loongarch: Implement gvec_*_vl functionsSong Gao
2023-09-20target/loongarch: Renamed lsx*.c to vec* .cSong Gao
2023-08-31target/helpers: Remove unnecessary 'qemu/main-loop.h' headerPhilippe Mathieu-Daudé
2023-08-31target/translate: Include missing 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé
2023-08-24target/loongarch: Split fcc register to fcc0-7 in gdbstubJiajie Chen
2023-08-24target/loongarch: cpu: Implement get_arch_id callbackBibo Mao
2023-08-24target/loongarch: Add avail_IOCSR to check iocsr instructionsSong Gao
2023-08-24target/loongarch: Add avail_LSX to check LSX instructionsSong Gao
2023-08-24target/loongarch: Add avail_LAM to check atomic instructionsSong Gao
2023-08-24target/loongarch: Add avail_LSPW to check LSPW instructionsSong Gao
2023-08-24target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructionsSong Gao
2023-08-24target/loongarch: Add LoongArch32 cpu la132Jiajie Chen
2023-08-24target/loongarch: Add avail_64 to check la64-only instructionsSong Gao
2023-08-24target/loongarch: Add a check parameter to the TRANS macroSong Gao
2023-08-24target/loongarch: Sign extend results in VA32 modeJiajie Chen
2023-08-24target/loongarch: Truncate high 32 bits of address in VA32 modeJiajie Chen
2023-08-24target/loongarch: Extract set_pc() helperJiajie Chen
2023-08-24target/loongarch: Extract make_address_pc() helperJiajie Chen
2023-08-24target/loongarch: Extract make_address_i() helperJiajie Chen
2023-08-24target/loongarch: Extract make_address_x() helperJiajie Chen
2023-08-24target/loongarch: Add LA64 & VA32 to DisasContextJiajie Chen
2023-08-24target/loongarch: Support LoongArch32 VPPNJiajie Chen
2023-08-24target/loongarch: Support LoongArch32 DMWJiajie Chen
2023-08-24target/loongarch: Support LoongArch32 TLB entryJiajie Chen
2023-08-24target/loongarch: Add GDB support for loongarch32 modeJiajie Chen
2023-08-24target/loongarch: Add new object class for loongarch32 cpusJiajie Chen
2023-08-24target/loongarch: Add function to check current archJiajie Chen
2023-08-24target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_initPhilippe Mathieu-Daudé
2023-08-24target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPUPhilippe Mathieu-Daudé
2023-08-24target/loongarch: Fix loongarch_la464_initfn() misses setting LSPWSong Gao
2023-08-24target/loongarch: Remove duplicated disas_set_info assignmentPhilippe Mathieu-Daudé
2023-08-24target/loongarch: Log I/O write accesses to CSR registersPhilippe Mathieu-Daudé
2023-07-25other architectures: spelling fixesMichael Tokarev
2023-07-24target/loongarch: Fix the CSRRD CPUID instruction on big endian hostsThomas Huth
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