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path: root/target/loongarch/translate.c
AgeCommit message (Expand)Author
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson
2023-10-03tcg: Rename cpu_env to tcg_envRichard Henderson
2023-09-20target/loongarch: Implement xvinsgr2vr xvpickve2grSong Gao
2023-09-20target/loongarch: Implement xvadd/xvsubSong Gao
2023-09-20target/loongarch: Add LASX data supportSong Gao
2023-09-20target/loongarch: Renamed lsx*.c to vec* .cSong Gao
2023-08-24target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructionsSong Gao
2023-08-24target/loongarch: Add avail_64 to check la64-only instructionsSong Gao
2023-08-24target/loongarch: Sign extend results in VA32 modeJiajie Chen
2023-08-24target/loongarch: Truncate high 32 bits of address in VA32 modeJiajie Chen
2023-08-24target/loongarch: Extract make_address_pc() helperJiajie Chen
2023-08-24target/loongarch: Extract make_address_i() helperJiajie Chen
2023-08-24target/loongarch: Extract make_address_x() helperJiajie Chen
2023-08-24target/loongarch: Add LA64 & VA32 to DisasContextJiajie Chen
2023-06-05target/*: Add missing includes of exec/translation-block.hRichard Henderson
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson
2023-05-06target/loongarch: Use {set/get}_gpr replace to cpu_fprSong Gao
2023-05-06target/loongarch: Implement vld vstSong Gao
2023-05-06target/loongarch: Implement vadd/vsubSong Gao
2023-05-06target/loongarch: meson.build support build LSXSong Gao
2023-04-04target/loongarch: Enables plugins to get instruction codestanhongze
2023-03-05target/loongarch: Drop temp_newRichard Henderson
2023-03-01accel/tcg: Pass max_insn to gen_intermediate_code by pointerRichard Henderson
2023-02-08Drop duplicate #includeMarkus Armbruster
2022-11-07target/loongarch: Separate the hardware flags into MMU index and PLVRui Wang
2022-11-04target/loongarch: Adjust the layout of hardware flags bit fieldsRui Wang
2022-10-26target/loongarch: Convert to tcg_ops restore_state_to_opcRichard Henderson
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson
2022-08-08target/loongarch: Remove cpu_fcsr0Richard Henderson
2022-06-06target/loongarch: Add timer related instructions support.Xiaojuan Yang
2022-06-06target/loongarch: Add LoongArch CSR instructionXiaojuan Yang
2022-06-06target/loongarch: Add branch instruction translationSong Gao
2022-06-06target/loongarch: Add floating point load/store instruction translationSong Gao
2022-06-06target/loongarch: Add floating point move instruction translationSong Gao
2022-06-06target/loongarch: Add floating point conversion instruction translationSong Gao
2022-06-06target/loongarch: Add floating point comparison instruction translationSong Gao
2022-06-06target/loongarch: Add floating point arithmetic instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point extra instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point atomic instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point load/store instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point bit instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point shift instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point arithmetic instruction translationSong Gao
2022-06-06target/loongarch: Add main translation routinesSong Gao
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