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path: root/target/loongarch/cpu.h
AgeCommit message (Expand)Author
2023-05-06target/loongarch: Implement LSX fpu arith instructionsSong Gao
2023-05-06target/loongarch: Add CHECK_SXE maccro for check LSX enableSong Gao
2023-05-06target/loongarch: Add LSX data type VRegSong Gao
2023-03-03target/loongarch: Implement Chip Configuraiton Version Register(0x0000)Song Gao
2023-02-27target/loongarch/cpu: Restrict "memory.h" header to sysemuPhilippe Mathieu-Daudé
2023-02-27target/loongarch/cpu: Remove unused "sysbus.h" headerBernhard Beschow
2022-12-16target/loongarch: Convert to 3-phase resetPeter Maydell
2022-11-07target/loongarch: Separate the hardware flags into MMU index and PLVRui Wang
2022-11-04target/loongarch: Fix emulation of float-point disable exceptionRui Wang
2022-11-04target/loongarch: Adjust the layout of hardware flags bit fieldsRui Wang
2022-11-04target/loongarch: Add exception subcodeSong Gao
2022-08-05target/loongarch: Fix macros SET_FPU_* in cpu.hQi Hu
2022-07-19hw/loongarch: Add fdt supportXiaojuan Yang
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao
2022-06-06hw/loongarch: Add LoongArch load elf function.Xiaojuan Yang
2022-06-06target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang
2022-06-06target/loongarch: Add constant timer supportXiaojuan Yang
2022-06-06target/loongarch: Add LoongArch interrupt and exception handleXiaojuan Yang
2022-06-06target/loongarch: Add MMU support for LoongArch CPU.Xiaojuan Yang
2022-06-06target/loongarch: Add CSRs definitionXiaojuan Yang
2022-06-06target/loongarch: Add core definitionSong Gao
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