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path: root/target/i386/translate.c
AgeCommit message (Expand)Author
2019-10-28target/i386: fetch code with translator_ldEmilio G. Cota
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen
2019-08-20icount: remove unnecessary gen_io_end callsPavel Dovgalyuk
2019-05-22target/i386: Implement CPUID_EXT_RDRANDRichard Henderson
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson
2019-04-09target/i386: Generate #UD for LOCK on a register incrementPeter Maydell
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini
2018-11-27target/i386: Generate #UD when applying LOCK to a register destinationRichard Henderson
2018-10-30target/i386: Remove #ifdeffed-out icebp debugging hackPeter Maydell
2018-10-02target/i386: fix translation for icount modePavel Dovgalyuk
2018-10-02target/i386: rename HF_SVMI_MASK to HF_GUEST_MASKPaolo Bonzini
2018-10-02target/i386: move x86_64_hregs to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_tmp1_i64 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_tmp3_i32 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_tmp2_i32 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_ptr1 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_ptr0 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_tmp4 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_tmp0 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_T1 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_T0 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_A0 to DisasContextEmilio G. Cota
2018-10-02target/i386: move cpu_cc_srcT to DisasContextEmilio G. Cota
2018-08-23fix "Missing break in switch" coverity reportsPaolo Bonzini
2018-06-28target-i386: Allow interrupt injection after STGIJan Kiszka
2018-06-28target/i386: Fix BLSR and BLSIRichard Henderson
2018-06-01tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson
2018-05-20tcg: fix s/compliment/complement/ typosEmilio G. Cota
2018-05-09translator: merge max_insns into DisasContextBaseEmilio G. Cota
2018-04-09Add missing bit for SSE instr in VEX decodingEugene Minibaev
2018-04-05target/i386: Fix andn instructionAlexandro Sanchez Bach
2017-12-29tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson
2017-12-21target/i386: Fix handling of VEX prefixesPeter Maydell
2017-12-21target/i386: Fix compiler warningsStefan Weil
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell
2017-10-25disas: Remove unused flags argumentsRichard Henderson
2017-10-25target/i386: Convert to disas_set_info hookRichard Henderson
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota
2017-10-24target/i386: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson
2017-10-24tcg: Remove TCGV_EQUAL*Richard Henderson
2017-10-16target/i386: trap on instructions longer than >15 bytesPaolo Bonzini
2017-10-16target/i386: introduce x86_ld*_codePaolo Bonzini
2017-10-10tcg: remove addr argument from lookup_tb_ptrEmilio G. Cota
2017-10-09x86: Correct translation of some rdgsbase and wrgsbase encodingsTodd Eisenberger
2017-09-19target/i386: set rip_offset for further SSE instructionsJoseph Myers
2017-09-06target/i386: [tcg] Port to generic translation frameworkLluís Vilanova
2017-09-06target/i386: [tcg] Port to disas_logLluís Vilanova
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