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QEMU is a generic and open source machine & userspace emulator and virtualizer
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Author
2019-08-20
icount: remove unnecessary gen_io_end calls
Pavel Dovgalyuk
2019-05-22
target/i386: Implement CPUID_EXT_RDRAND
Richard Henderson
2019-04-24
tcg: Hoist max_insns computation to tb_gen_code
Richard Henderson
2019-04-09
target/i386: Generate #UD for LOCK on a register increment
Peter Maydell
2019-01-11
avoid TABs in files that only contain a few
Paolo Bonzini
2018-11-27
target/i386: Generate #UD when applying LOCK to a register destination
Richard Henderson
2018-10-30
target/i386: Remove #ifdeffed-out icebp debugging hack
Peter Maydell
2018-10-02
target/i386: fix translation for icount mode
Pavel Dovgalyuk
2018-10-02
target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK
Paolo Bonzini
2018-10-02
target/i386: move x86_64_hregs to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_tmp1_i64 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_tmp3_i32 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_tmp2_i32 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_ptr1 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_ptr0 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_tmp4 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_tmp0 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_T1 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_T0 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_A0 to DisasContext
Emilio G. Cota
2018-10-02
target/i386: move cpu_cc_srcT to DisasContext
Emilio G. Cota
2018-08-23
fix "Missing break in switch" coverity reports
Paolo Bonzini
2018-06-28
target-i386: Allow interrupt injection after STGI
Jan Kiszka
2018-06-28
target/i386: Fix BLSR and BLSI
Richard Henderson
2018-06-01
tcg: Pass tb and index to tcg_gen_exit_tb separately
Richard Henderson
2018-05-20
tcg: fix s/compliment/complement/ typos
Emilio G. Cota
2018-05-09
translator: merge max_insns into DisasContextBase
Emilio G. Cota
2018-04-09
Add missing bit for SSE instr in VEX decoding
Eugene Minibaev
2018-04-05
target/i386: Fix andn instruction
Alexandro Sanchez Bach
2017-12-29
tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*
Richard Henderson
2017-12-21
target/i386: Fix handling of VEX prefixes
Peter Maydell
2017-12-21
target/i386: Fix compiler warnings
Stefan Weil
2017-10-27
Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging
Peter Maydell
2017-10-25
disas: Remove unused flags arguments
Richard Henderson
2017-10-25
target/i386: Convert to disas_set_info hook
Richard Henderson
2017-10-24
tcg: Initialize cpu_env generically
Richard Henderson
2017-10-24
tcg: define tcg_init_ctx and make tcg_ctx a pointer
Emilio G. Cota
2017-10-24
target/i386: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
2017-10-24
tcg: convert tb->cflags reads to tb_cflags(tb)
Emilio G. Cota
2017-10-24
qom: Introduce CPUClass.tcg_initialize
Richard Henderson
2017-10-24
tcg: Remove TCGV_EQUAL*
Richard Henderson
2017-10-16
target/i386: trap on instructions longer than >15 bytes
Paolo Bonzini
2017-10-16
target/i386: introduce x86_ld*_code
Paolo Bonzini
2017-10-10
tcg: remove addr argument from lookup_tb_ptr
Emilio G. Cota
2017-10-09
x86: Correct translation of some rdgsbase and wrgsbase encodings
Todd Eisenberger
2017-09-19
target/i386: set rip_offset for further SSE instructions
Joseph Myers
2017-09-06
target/i386: [tcg] Port to generic translation framework
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to disas_log
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to tb_stop
Lluís Vilanova
2017-09-06
target/i386: [tcg] Port to translate_insn
Lluís Vilanova
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