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2021-05-19target/i386: Cleanup read_crN, write_crN, lmswRichard Henderson
Pull the svm intercept check into the translator. Pull the entire implementation of lmsw into the translator. Push the check for CR8LEG into the regno validation switch. Unify the gen_io_start check between read/write. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210514151342.384376-40-richard.henderson@linaro.org>
2021-05-19target/i386: Remove user stub for cpu_vmexitRichard Henderson
This function is only called from tcg/sysemu/. There is no need for a stub in tcg/user/. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-39-richard.henderson@linaro.org>
2021-05-19target/i386: Remove pc_start argument to gen_svm_check_interceptRichard Henderson
When exiting helper_svm_check_intercept via exception, cpu_vmexit calls cpu_restore_state, which will recover eip and cc_op via unwind. Therefore we do not need to store eip or cc_op before the call. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-38-richard.henderson@linaro.org>
2021-05-19target/i386: Tidy svm_check_intercept from tcgRichard Henderson
The param argument to helper_svm_check_intercept_param is always 0; eliminate it and rename to helper_svm_check_intercept. Fold gen_svm_check_intercept_param into gen_svm_check_intercept. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-37-richard.henderson@linaro.org>
2021-05-19target/i386: Simplify gen_debug usageRichard Henderson
Both invocations pass the start of the current instruction, which is available as s->base.pc_next. The function sets is_jmp, so we can eliminate a second setting. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-36-richard.henderson@linaro.org>
2021-05-19target/i386: Mark some helpers as noreturnRichard Henderson
Any helper that always raises an exception or interrupt, or simply exits to the main loop, can be so marked. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-35-richard.henderson@linaro.org>
2021-05-19target/i386: Eliminate SVM helpers for user-onlyRichard Henderson
Use STUB_HELPER to ensure that such calls are always eliminated. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-34-richard.henderson@linaro.org>
2021-05-19target/i386: Implement skinit in translate.cRichard Henderson
Our sysemu implementation is a stub. We can already intercept instructions for vmexit, and raising #UD is trivial. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-33-richard.henderson@linaro.org>
2021-05-19target/i386: Assert !GUEST for user-onlyRichard Henderson
For user-only, we do not need to check for VMM intercept. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-32-richard.henderson@linaro.org>
2021-05-19target/i386: Assert !SVME for user-onlyRichard Henderson
Most of the VMM instructions are already disabled for user-only, by being usable only from ring 0. The spec is intentionally loose for VMMCALL, allowing the VMM to define syscalls for user-only. However, we're not emulating any VMM, so VMMCALL can just raise #UD unconditionally. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210514151342.384376-31-richard.henderson@linaro.org>
2021-05-19target/i386: Add stub generator for helper_set_drRichard Henderson
This removes an ifdef from the middle of disas_insn, and ensures that the branch is not reachable. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-30-richard.henderson@linaro.org>
2021-05-19target/i386: Reorder DisasContext membersRichard Henderson
Sort all of the single-byte members to the same area of the structure, eliminating 8 bytes of padding. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-29-richard.henderson@linaro.org>
2021-05-19target/i386: Fix the comment for repz_optRichard Henderson
After fixing a typo in the comment, fixup for CODING_STYLE. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210514151342.384376-28-richard.henderson@linaro.org>
2021-05-19target/i386: Reduce DisasContext jmp_opt, repz_opt to boolRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-27-richard.henderson@linaro.org>
2021-05-19target/i386: Leave TF in DisasContext.flagsRichard Henderson
It's just as easy to clear the flag with AND than assignment. In two cases the test for the bit can be folded together with the test for HF_INHIBIT_IRQ_MASK. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-26-richard.henderson@linaro.org>
2021-05-19target/i386: Reduce DisasContext popl_esp_hack and rip_offset to uint8_tRichard Henderson
Both of these fields store the size of a single memory access, so the range of values is 0-8. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-25-richard.henderson@linaro.org>
2021-05-19target/i386: Reduce DisasContext.vex_[lv] to uint8_tRichard Henderson
Currently, vex_l is either {0,1}; if in the future we implement AVX-512, the max value will be 2. In vex_v we store a register number. This is 0-15 for SSE, and 0-31 for AVX-512. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-24-richard.henderson@linaro.org>
2021-05-19target/i386: Reduce DisasContext.prefix to uint8_tRichard Henderson
The highest bit in this set is 0x40 (PREFIX_REX). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-23-richard.henderson@linaro.org>
2021-05-19target/i386: Reduce DisasContext.override to int8_tRichard Henderson
The range of values is -1 (none) to 5 (R_GS). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-22-richard.henderson@linaro.org>
2021-05-19target/i386: Reduce DisasContext.flags to uint32_tRichard Henderson
The value comes from tb->flags, which is uint32_t. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-21-richard.henderson@linaro.org>
2021-05-19target/i386: Remove DisasContext.f_st as unusedRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-20-richard.henderson@linaro.org>
2021-05-19target/i386: Move rex_w into DisasContextRichard Henderson
Treat this flag exactly like we treat the other rex bits. The -1 initialization is unused; the two tests are > 0 and == 1, so the value can be reduced to a bool. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-19-richard.henderson@linaro.org>
2021-05-19target/i386: Move rex_r into DisasContextRichard Henderson
Treat this flag exactly like we treat rex_b and rex_x. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-18-richard.henderson@linaro.org>
2021-05-19target/i386: Tidy REX_B, REX_X definitionRichard Henderson
Change the storage from int to uint8_t since the value is in {0,8}. For x86_64 add 0 in the macros to (1) promote the type back to int, and (2) make the macro an rvalue. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-17-richard.henderson@linaro.org>
2021-05-19target/i386: Introduce REX_PREFIXRichard Henderson
The existing flag, x86_64_hregs, does not accurately describe its setting. It is true if and only if a REX prefix has been seen. Yes, that affects the "h" regs, but that's secondary. Add PREFIX_REX and include this bit in s->prefix. Add REX_PREFIX so that the check folds away when x86_64 is compiled out. Fold away the reg >= 8 check, because bit 3 of the register number comes from the REX prefix in the first place. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-16-richard.henderson@linaro.org>
2021-05-19target/i386: Assert !ADDSEG for x86_64 user-onlyRichard Henderson
LMA disables traditional segmentation, exposing a flat address space. This means that ADDSEG is off. Since we're adding an accessor macro, pull the value directly out of flags otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-15-richard.henderson@linaro.org>
2021-05-19target/i386: Assert LMA for x86_64 user-onlyRichard Henderson
LMA is a pre-requisite for CODE64, so there is no way to disable it for x86_64-linux-user, and there is no way to enable it for i386. Since we're adding an accessor macro, pull the value directly out of flags when we're not assuming a constant. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-14-richard.henderson@linaro.org>
2021-05-19target/i386: Assert CODE64 for x86_64 user-onlyRichard Henderson
For x86_64 user-only, there is no way to leave 64-bit mode. Without x86_64, there is no way to enter 64-bit mode. There is an existing macro to aid with that; simply place it in the right place in the ifdef chain. Since we're adding an accessor macro, pull the value directly out of flags when we're not assuming a constant. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-13-richard.henderson@linaro.org>
2021-05-19target/i386: Assert SS32 for x86_64 user-onlyRichard Henderson
For user-only, SS32 == !VM86, because we are never in real-mode. Since we cannot enter vm86 mode for x86_64 user-only, SS32 is always set. Since we're adding an accessor macro, pull the value directly out of flags otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-12-richard.henderson@linaro.org>
2021-05-19target/i386: Assert CODE32 for x86_64 user-onlyRichard Henderson
For user-only, CODE32 == !VM86, because we are never in real-mode. Since we cannot enter vm86 mode for x86_64 user-only, CODE32 is always set. Since we're adding an accessor macro, pull the value directly out of flags otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-11-richard.henderson@linaro.org>
2021-05-19target/i386: Assert !VM86 for x86_64 user-onlyRichard Henderson
For i386-linux-user, we can enter vm86 mode via the vm86(2) syscall. That syscall explicitly returns to 32-bit mode, and the syscall does not exist for a 64-bit x86_64 executable. Since we're adding an accessor macro, pull the value directly out of flags otherwise. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-10-richard.henderson@linaro.org>
2021-05-19target/i386: Assert IOPL is 0 for user-onlyRichard Henderson
On real hardware, the linux kernel has the iopl(2) syscall which can set IOPL to 3, to allow e.g. the xserver to briefly disable interrupts while programming the graphics card. However, QEMU cannot and does not implement this syscall, so the IOPL is never changed from 0. Which means that all of the checks vs CPL <= IOPL are false for user-only. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-9-richard.henderson@linaro.org>
2021-05-19target/i386: Assert CPL is 3 for user-onlyRichard Henderson
A user-mode executable always runs in ring 3. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-8-richard.henderson@linaro.org>
2021-05-19target/i386: Assert PE is set for user-onlyRichard Henderson
A user-mode executable is never in real-mode. Since we're adding an accessor macro, pull the value directly out of flags for sysemu. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-7-richard.henderson@linaro.org>
2021-05-19target/i386: Split out check_ioplRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-6-richard.henderson@linaro.org>
2021-05-19target/i386: Split out check_vm86_ioplRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-5-richard.henderson@linaro.org>
2021-05-19target/i386: Unify code paths for IRETRichard Henderson
In vm86 mode, we use the same helper as real-mode, but with an extra check for IOPL. All non-exceptional paths set EFLAGS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-4-richard.henderson@linaro.org>
2021-05-19target/i386: Split out check_cpl0Richard Henderson
Split out the check for CPL != 0 and the raising of #GP. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-3-richard.henderson@linaro.org>
2021-05-19target/i386: Split out gen_exception_gpfRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-2-richard.henderson@linaro.org>
2021-05-11target/i386: use mmu_translate for NPT walkPaolo Bonzini
Unify the duplicate code between get_hphys and mmu_translate, by simply making get_hphys call mmu_translate. This also fixes the support for 5-level nested page tables. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-11target/i386: allow customizing the next phase of the translationPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-11target/i386: extend pg_mode to more CR0 and CR4 bitsPaolo Bonzini
In order to unify the two stages of page table lookup, we need mmu_translate to use either the host CR0/EFER/CR4 or the guest's. To do so, make mmu_translate use the same pg_mode constants that were used for the NPT lookup. This also prepares for adding 5-level NPT support, which however does not work yet. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-11target/i386: pass cr3 to mmu_translatePaolo Bonzini
First step in unifying the nested and regular page table walk. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-11target/i386: extract mmu_translatePaolo Bonzini
Extract the page table lookup out of handle_mmu_fault, which only has to invoke mmu_translate and either fill the TLB or deliver the page fault. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-11target/i386: move paging mode constants from SVM to cpu.hPaolo Bonzini
We will reuse the page walker for both SVM and regular accesses. To do so we will build a function that receives the currently active paging mode; start by including in cpu.h the constants and the function to go from cr4/hflags/efer to the paging mode. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-11target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constantsPaolo Bonzini
They are the same value, and are so by design. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-10accel: add init_accel_cpu for adapting accel behavior to CPU typeClaudio Fontana
while on x86 all CPU classes can use the same set of TCGCPUOps, on ARM the right accel behavior depends on the type of the CPU. So we need a way to specialize the accel behavior according to the CPU. Therefore, add a second initialization, after the accel_cpu->cpu_class_init, that allows to do this. Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210322132800.7470-24-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-10i386: split seg_helper into user-only and sysemu partsClaudio Fontana
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio]: Rebased on commit 68775856 ("target/i386: svm: do not discard high 32 bits") Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210322132800.7470-18-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-10i386: split svm_helper into sysemu and stub-only userClaudio Fontana
For now we just copy over the previous user stubs, but really, everything that requires s->cpl == 0 should be impossible to trigger from user-mode emulation. Later on we should add a check that asserts this easily f.e.: static bool check_cpl0(DisasContext *s) { int cpl = s->cpl; #ifdef CONFIG_USER_ONLY assert(cpl == 3); #endif if (cpl != 0) { gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base); return false; } return true; } Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-17-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-05-10i386: separate fpu_helper sysemu-only partsClaudio Fontana
create a separate tcg/sysemu/fpu_helper.c for the sysemu-only parts. For user mode, some small #ifdefs remain in tcg/fpu_helper.c which do not seem worth splitting into their own user-mode module. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-16-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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