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2023-11-07target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu'Philippe Mathieu-Daudé
Follow the naming used by other files in target/i386/. No functional changes. Suggested-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231020111136.44401-4-philmd@linaro.org>
2023-11-07target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs'Philippe Mathieu-Daudé
Follow the naming used by other files in target/i386/. No functional changes. Suggested-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231020111136.44401-3-philmd@linaro.org>
2023-11-07target/i386/hvf: Use CPUState typedefPhilippe Mathieu-Daudé
Follow C style guidelines and use CPUState forward declaration from "qemu/typedefs.h". No functional changes. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231020111136.44401-2-philmd@linaro.org>
2023-11-07target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr]()Philippe Mathieu-Daudé
When CPUArchState* is available (here CPUX86State*), we can use the fast env_archcpu() macro to get ArchCPU* (here X86CPU*). The QOM cast X86_CPU() macro will be slower when building with --enable-qom-cast-debug. Pass CPUX86State* as argument to simulate_rdmsr / simulate_wrmsr instead of a CPUState* to avoid an extra cast. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Roman Bolshakov <roman@roolebo.dev> Tested-by: Roman Bolshakov <roman@roolebo.dev> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231009110239.66778-7-philmd@linaro.org>
2023-11-07target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]()Philippe Mathieu-Daudé
We already have 'x86_cpu = X86_CPU(cpu)'. Use the variable instead of doing another QOM cast with X86_CPU(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Roman Bolshakov <roman@roolebo.dev> Tested-by: Roman Bolshakov <roman@roolebo.dev> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231009110239.66778-6-philmd@linaro.org>
2023-06-28accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUStatePhilippe Mathieu-Daudé
We want all accelerators to share the same opaque pointer in CPUState. Rename the 'hvf_vcpu_state' structure as 'AccelCPUState'. Use the generic 'accel' field of CPUState instead of 'hvf'. Replace g_malloc0() by g_new0() for readability. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20230624174121.11508-17-philmd@linaro.org>
2022-04-06Remove qemu-common.h include from most unitsMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-33-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-03-06target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé
The CPU / CPU state are forward declared. $ git grep -E 'struct [A-Za-z]+CPU\ \*' target/arm/hvf_arm.h:16:void hvf_arm_set_cpu_features_from_host(struct ARMCPU *cpu); target/openrisc/cpu.h:234: int (*cpu_openrisc_map_address_code)(struct OpenRISCCPU *cpu, target/openrisc/cpu.h:238: int (*cpu_openrisc_map_address_data)(struct OpenRISCCPU *cpu, $ git grep -E 'struct CPU[A-Za-z0-9]+State\ \*' target/mips/internal.h:137: int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot, target/mips/internal.h:139: void (*helper_tlbwi)(struct CPUMIPSState *env); target/mips/internal.h:140: void (*helper_tlbwr)(struct CPUMIPSState *env); target/mips/internal.h:141: void (*helper_tlbp)(struct CPUMIPSState *env); target/mips/internal.h:142: void (*helper_tlbr)(struct CPUMIPSState *env); target/mips/internal.h:143: void (*helper_tlbinv)(struct CPUMIPSState *env); target/mips/internal.h:144: void (*helper_tlbinvf)(struct CPUMIPSState *env); target/xtensa/cpu.h:347: struct CPUXtensaState *env; ... Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-12-f4bug@amsat.org>
2021-06-03hvf: Introduce hvf vcpu structAlexander Graf
We will need more than a single field for hvf going forward. To keep the global vcpu struct uncluttered, let's allocate a special hvf vcpu struct, similar to how hax does it. Signed-off-by: Alexander Graf <agraf@csgraf.de> Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com> Tested-by: Roman Bolshakov <r.bolshakov@yadro.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20210519202253.76782-12-agraf@csgraf.de Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNTVladislav Yaroshchuk
Some guests (ex. Darwin-XNU) can attemp to read this MSR to retrieve and validate CPU topology comparing it to ACPI MADT content MSR description from Intel Manual: 35H: MSR_CORE_THREAD_COUNT: Configured State of Enabled Processor Core Count and Logical Processor Count Bits 15:0 THREAD_COUNT The number of logical processors that are currently enabled in the physical package Bits 31:16 Core_COUNT The number of processor cores that are currently enabled in the physical package Bits 63:32 Reserved Signed-off-by: Vladislav Yaroshchuk <yaroshchuk2000@gmail.com> Message-Id: <20210113205323.33310-1-yaroshchuk2000@gmail.com> [RB: reordered MSR definition and dropped u suffix from shift offset] Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-11-15x86 hvf cpus: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023124012.20035-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-06-12i386: hvf: Move mmio_buf into CPUX86StateRoman Bolshakov
There's no similar field in CPUX86State, but it's needed for MMIO traps. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200528193758.51454-13-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-12i386: hvf: Drop regs in HVFX86EmulatorStateRoman Bolshakov
HVFX86EmulatorState carries it's own copy of x86 registers. It can be dropped in favor of regs in generic CPUX86State. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200528193758.51454-11-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-12i386: hvf: Drop rflags from HVFX86EmulatorStateRoman Bolshakov
HVFX86EmulatorState carries it's own copy of x86 flags. It can be dropped in favor of eflags in generic CPUX86State. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200528193758.51454-9-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-12i386: hvf: Use IP from CPUX86StateRoman Bolshakov
Drop and replace rip field from HVFX86EmulatorState in favor of eip from common CPUX86State. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200528193758.51454-7-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-01-24target/i386: add a ucode-rev propertyPaolo Bonzini
Add the property and plumb it in TCG and HVF (the latter of which tried to support returning a constant value but used the wrong MSR). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1579544504-3616-3-git-send-email-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-11-26hvf: remove TSC synchronization code because it isn't fully completeCameron Esfahani
The existing code in QEMU's HVF support to attempt to synchronize TSC across multiple cores is not sufficient. TSC value on other cores can go backwards. Until implementation is fixed, remove calls to hv_vm_sync_tsc(). Pass through TSC to guest OS. Signed-off-by: Cameron Esfahani <dirty@apple.com> Message-Id: <44c4afd2301b8bf99682b229b0796d84edd6d66f.1574625592.git.dirty@apple.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
Now that we have both ArchCPU and CPUArchState, we can define this generically instead of via macro in each target's cpu.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-12-22i386: hvf: cleanup x86_gen.hPaolo Bonzini
This only includes VM_PANIC now. No need to include it from headers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: remove addr_tPaolo Bonzini
Use target_ulong for virtual addresses and uint64_t for physical addresses. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: simplify flag handlingPaolo Bonzini
Remove much indirection and duplicate code, and provide a cleaner interface out of x86_flags.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: abort on decoding errorPaolo Bonzini
Rather than unsupported situations, some VM_PANIC calls actually are caused by internal errors. Convert them to just abort. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: remove more dead emulator codePaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: unify register enums between HVF and the restPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: move all hvf files in the same directoryPaolo Bonzini
Just call it hvf/, no need for the "utils" suffix. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-17 02:39:49 +0000