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path: root/target/hppa/op_helper.c
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2019-02-06target/hppa: fix PSW Q bit behaviour to match hardwareSven Schnelle
PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1 with this instruction, if it was not already 1, is an undefined operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1 with the SSM instruction. Tested this both on HP9000/712 and HP9000/785/C3750, both machines set the Q bit from 0 to 1 without exception. This makes HP-UX 10.20 progress a little bit further. Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190129191402.29539-1-svens@stackframe.org> [rth: Add a comment to the code as well.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-17target/hppa: Remove floatX_maybe_silence_nan from conversionsRichard Henderson
This is now handled properly by the generic softfloat code. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée
As cpu.h is another typically widely included file which doesn't need full access to the softfloat API we can remove the includes from here as well. Where they do need types it's typically for float_status and the rounding modes so we move that to softfloat-types.h as well. As a result of not having softfloat in every cpu.h call we now need to add it to various helpers that do need the full softfloat.h definitions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [For PPC parts] Acked-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-31target/hppa: Implement PROBE for system modeRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31target/hppa: Implement halt and reset instructionsHelge Deller
Real hardware would use an external device to control the power. But for the moment let's invent instructions in reserved space, to be used by our custom firmware. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement LPARichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement the interval timerRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement IASQRichard Henderson
Any one TB will have only one space value. If we change spaces, we change TBs. Thus BE and BEV must exit the TB immediately. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement rfiRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement the system mask instructionsRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Split address size from register sizeRichard Henderson
For system mode, we will need 64-bit virtual addresses even when we have 32-bit register sizes. Since the rest of QEMU equates TARGET_LONG_BITS with the address size, redefine everything related to register size in terms of a new TARGET_REGISTER_BITS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Define hardware exception typesRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Skeleton support for hppa-softmmuHelge Deller
With the addition of default-configs/hppa-softmmu.mak, this will compile. It is not enabled with this patch, however. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier
The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
2017-10-24target/hppa: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-01-23target-hppa: Implement floating-point insnsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Implement system and memory-management insnsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Implement loads and storesRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Implement basic arithmeticRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Add framework and enable compilationRichard Henderson
This is just about the minimum required to enable compilation without actually executing any instructions. This contains the HPPACPU structure and the required callbacks, the gdbstub, the basic translation loop, and a translate_one function that always results in an illegal instruction. Signed-off-by: Richard Henderson <rth@twiddle.net>