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AgeCommit message (Expand)Author
2021-10-28Hexagon (target/hexagon) more tcg_constant_*Taylor Simpson
2021-10-15target/hexagon: Drop checks for singlestep_enabledRichard Henderson
2021-10-13target/hexagon: Implement cpu_mmu_indexRichard Henderson
2021-10-06target/hexagon: Use tcg_constant_*Philippe Mathieu-Daudé
2021-10-06target/hexagon: Remove unused TCG temporary from predicated loadsPhilippe Mathieu-Daudé
2021-10-06Hexagon (target/hexagon) probe the stores in a packet at start of commitTaylor Simpson
2021-10-05hexagon: use env keyword argument to pass PYTHONPATHPaolo Bonzini
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich
2021-07-26Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210725' into stagingPeter Maydell
2021-07-21target/hexagon: Drop include of qemu.hPeter Maydell
2021-07-21Hexagon (target/hexagon) remove put_user_*/get_user_*Taylor Simpson
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson
2021-06-29Hexagon (target/hexagon) remove unused TCG variablesTaylor Simpson
2021-06-29Hexagon (target/hexagon) cleanup gen_store_conditional[48] functionsTaylor Simpson
2021-06-29Hexagon (target/hexagon) fix l2fetch instructionsTaylor Simpson
2021-06-29Hexagon (target/hexagon) fix bug in fLSBNEW*Taylor Simpson
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson
2021-05-05Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell
2021-05-02hw: Do not include qemu/log.h if it is not necessaryThomas Huth
2021-05-01Hexagon (target/hexagon) CABAC decode binTaylor Simpson
2021-05-01Hexagon (target/hexagon) load into shifted register instructionsTaylor Simpson
2021-05-01Hexagon (target/hexagon) load and unpack bytes instructionsTaylor Simpson
2021-05-01Hexagon (target/hexagon) bit reverse (brev) addressingTaylor Simpson
2021-05-01Hexagon (target/hexagon) circular addressingTaylor Simpson
2021-05-01Hexagon (target/hexagon) add A4_addp_c/A4_subp_cTaylor Simpson
2021-05-01Hexagon (target/hexagon) add A6_vminub_RdPTaylor Simpson
2021-05-01Hexagon (target/hexagon) add A5_ACS (vacsh)Taylor Simpson
2021-05-01Hexagon (target/hexagon) add F2_sfinvsqrtaTaylor Simpson
2021-05-01Hexagon (target/hexagon) add F2_sfrecipa instructionTaylor Simpson
2021-05-01Hexagon (target/hexagon) compile all debug codeTaylor Simpson
2021-05-01Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.hTaylor Simpson
2021-05-01Hexagon (target/hexagon) cleanup reg_field_info definitionTaylor Simpson
2021-05-01Hexagon (target/hexagon) cleanup ternary operators in semanticsTaylor Simpson
2021-05-01Hexagon (target/hexagon) use softfloat for float-to-int conversionsTaylor Simpson
2021-05-01Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbnTaylor Simpson
2021-05-01Hexagon (target/hexagon) use softfloat default NaN and tininessTaylor Simpson
2021-05-01Hexagon (target/hexagon) change type of softfloat_roundingmodesTaylor Simpson
2021-05-01Hexagon (target/hexagon) remove unused carry_from_add64 functionTaylor Simpson
2021-05-01Hexagon (target/hexagon) change variables from int to bool when appropriateTaylor Simpson
2021-05-01Hexagon (target/hexagon) decide if pred has been written at TCG gen timeTaylor Simpson
2021-05-01Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURNTaylor Simpson
2021-05-01Hexagon (target/hexagon) use env_archcpu and env_cpuTaylor Simpson
2021-05-01Hexagon (target/hexagon) remove unnecessary inline directivesTaylor Simpson
2021-05-01Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pairTaylor Simpson
2021-05-01Hexagon (target/hexagon) TCG generation cleanupTaylor Simpson
2021-05-01target/hexagon: remove unnecessary semicolonsTaylor Simpson
2021-05-01target/hexagon: fix typo in commentTaylor Simpson
2021-05-01target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUMTaylor Simpson
2021-05-01target/hexagon: remove unnecessary checks in find_iclass_slotsTaylor Simpson