slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Collapse)	Author
2023-05-18	Hexagon (gdbstub): add HVX support	Taylor Simpson
	Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Co-authored-by: Brian Cain <bcain@quicinc.com> Signed-off-by: Brian Cain <bcain@quicinc.com> Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com> Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <17cb32f34d469f705c3cc066a3583935352ee048.1683214375.git.quic_mathbern@quicinc.com>
2022-02-21	exec/exec-all: Move 'qemu/log.h' include in units requiring it	Philippe Mathieu-Daudé
	Many files use "qemu/log.h" declarations but neglect to include it (they inherit it via "exec/exec-all.h"). "exec/exec-all.h" is a core component and shouldn't be used that way. Move the "qemu/log.h" inclusion locally to each unit requiring it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220207082756.82600-10-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-11-03	Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core	Taylor Simpson
	HVX is a set of wide vector instructions. Machine state includes vector registers (VRegs) vector predicate registers (QRegs) temporary registers for intermediate values store buffer (masked stores and scatter/gather) Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-05-01	Hexagon (target/hexagon) compile all debug code	Taylor Simpson
	Change #if HEX_DEBUG to if (HEX_DEBUG) so the debug code doesn't bit rot Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-17-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-18	Hexagon (target/hexagon) GDB Stub	Taylor Simpson
	GDB register read and write routines Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1612763186-18161-9-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-18	Hexagon (target/hexagon) scalar core definition	Taylor Simpson
	Add target state header, target definitions and initialization routines Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-18161-5-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>