Age | Commit message (Expand) | Author |
2021-07-09 | meson: Introduce target-specific Kconfig | Philippe Mathieu-Daudé |
2021-06-29 | target/avr: Convert to TranslatorOps | Richard Henderson |
2021-06-29 | target/avr: Change ctx to DisasContext* in gen_intermediate_code | Richard Henderson |
2021-06-29 | target/avr: Add DisasContextBase to DisasContext | Richard Henderson |
2021-05-26 | hw/core: Constify TCGCPUOps | Richard Henderson |
2021-05-26 | cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps | Philippe Mathieu-Daudé |
2021-05-26 | cpu: Introduce SysemuCPUOps structure | Philippe Mathieu-Daudé |
2021-05-26 | cpu: Move AVR target vmsd field from CPUClass to DeviceClass | Philippe Mathieu-Daudé |
2021-05-26 | cpu: Rename CPUClass vmsd -> legacy_vmsd | Philippe Mathieu-Daudé |
2021-05-13 | target/avr: Ignore unimplemented WDR opcode | Philippe Mathieu-Daudé |
2021-03-15 | target/avr: Fix interrupt execution | Ivanov Arkasha |
2021-03-15 | target/avr: Fix some comment spelling errors | Lichang Zhao |
2021-02-20 | target/avr/cpu: Use device_class_set_parent_realize() | Philippe Mathieu-Daudé |
2021-02-05 | cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass | Claudio Fontana |
2021-02-05 | cpu: move cc->do_interrupt to tcg_ops | Claudio Fontana |
2021-02-05 | cpu: Move tlb_fill to tcg_ops | Eduardo Habkost |
2021-02-05 | cpu: Move cpu_exec_* to tcg_ops | Eduardo Habkost |
2021-02-05 | cpu: Move synchronize_from_tb() to tcg_ops | Eduardo Habkost |
2021-02-05 | cpu: Introduce TCGCpuOperations struct | Eduardo Habkost |
2021-01-07 | tcg: Make tb arg to synchronize_from_tb const | Richard Henderson |
2020-12-19 | migration: Replace migration's JSON writer by the general one | Markus Armbruster |
2020-09-18 | qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros | Eduardo Habkost |
2020-09-09 | Use OBJECT_DECLARE_TYPE where possible | Eduardo Habkost |
2020-09-09 | Use DECLARE_*CHECKER* macros | Eduardo Habkost |
2020-09-09 | Move QOM typedefs and add missing includes | Eduardo Habkost |
2020-08-21 | meson: target | Paolo Bonzini |
2020-08-21 | meson: rename included C source files to .c.inc | Paolo Bonzini |
2020-07-11 | target/avr/disas: Fix store instructions display order | Philippe Mathieu-Daudé |
2020-07-11 | target/avr/cpu: Fix $PC displayed address | Philippe Mathieu-Daudé |
2020-07-11 | target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() | Philippe Mathieu-Daudé |
2020-07-11 | target/avr: Register AVR support with the rest of QEMU | Michael Rolnik |
2020-07-11 | target/avr: Add support for disassembling via option '-d in_asm' | Michael Rolnik |
2020-07-11 | target/avr: Initialize TCG register variables | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - CPU main translation function | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - MCU Control Instructions | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - Bit and Bit-test Instructions | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - Data Transfer Instructions | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - Branch Instructions | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - Arithmetic and Logic Instructions | Michael Rolnik |
2020-07-11 | target/avr: Add instruction translation - Register definitions | Michael Rolnik |
2020-07-11 | target/avr: Add instruction helpers | Michael Rolnik |
2020-07-10 | target/avr: Add definitions of AVR core types | Michael Rolnik |
2020-07-10 | target/avr: Introduce enumeration AVRFeature | Michael Rolnik |
2020-07-10 | target/avr: CPU class: Add GDB support | Michael Rolnik |
2020-07-10 | target/avr: CPU class: Add migration support | Michael Rolnik |
2020-07-10 | target/avr: CPU class: Add memory management support | Michael Rolnik |
2020-07-10 | target/avr: CPU class: Add interrupt handling support | Michael Rolnik |
2020-07-10 | target/avr: Introduce basic CPU class object | Michael Rolnik |
2020-07-10 | target/avr: Add basic parameters of the new platform | Michael Rolnik |