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AgeCommit message (Expand)Author
2023-03-07gdbstub: move register helpers into standalone includeAlex Bennée
2023-03-05target/avr: Drop tcg_temp_freeRichard Henderson
2023-03-05target/avr: Drop R from trans_COMRichard Henderson
2023-03-05target/avr: Drop DisasContext.free_skip_var0Richard Henderson
2023-03-01accel/tcg: Pass max_insn to gen_intermediate_code by pointerRichard Henderson
2023-03-01target/avr: Replace `tb_pc()` with `tb->pc`Anton Johansson
2022-12-16target/avr: Convert to 3-phase resetPeter Maydell
2022-12-14cleanup: Tweak and re-run return_directly.cocciMarkus Armbruster
2022-10-26target/avr: Convert to tcg_ops restore_state_to_opcRichard Henderson
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson
2022-09-01target/avr: Disable interrupts when env->skip setRichard Henderson
2022-09-01target/avr: Only execute one interrupt at a timeRichard Henderson
2022-09-01target/avr: Call avr_cpu_do_interrupt directlyRichard Henderson
2022-09-01target/avr: Support probe argument to tlb_fillRichard Henderson
2022-06-20target/avr: Drop avr_cpu_memory_rw_debug()Bin Meng
2022-05-11Clean up decorations and whitespace around header guardsMarkus Armbruster
2022-05-11Clean up header guards that don't match their file nameMarkus Armbruster
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé
2022-02-22Merge remote-tracking branch 'remotes/lvivier-gitlab/tags/trivial-branch-for-...Peter Maydell
2022-02-21target/avr: Correct AVRCPUClass docstringPhilippe Mathieu-Daudé
2022-02-21exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé
2021-10-15target/avr: Drop checks for singlestep_enabledRichard Henderson
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson
2021-09-16Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.2-pul...Peter Maydell
2021-09-16target/avr: Fix compiler errors (-Werror=enum-conversion)Stefan Weil
2021-09-14target/avr: Remove pointless use of CONFIG_USER_ONLY definitionPhilippe Mathieu-Daudé
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson
2021-07-21target/avr: Implement gdb_adjust_breakpointRichard Henderson
2021-07-12Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell
2021-07-09target/avr: Mark some helpers noreturnRichard Henderson
2021-07-09target/avr: Use translator_use_goto_tbRichard Henderson
2021-07-09meson: Introduce target-specific KconfigPhilippe Mathieu-Daudé
2021-06-29target/avr: Convert to TranslatorOpsRichard Henderson
2021-06-29target/avr: Change ctx to DisasContext* in gen_intermediate_codeRichard Henderson
2021-06-29target/avr: Add DisasContextBase to DisasContextRichard Henderson
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson
2021-05-26cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé
2021-05-26cpu: Move AVR target vmsd field from CPUClass to DeviceClassPhilippe Mathieu-Daudé
2021-05-26cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé
2021-05-13target/avr: Ignore unimplemented WDR opcodePhilippe Mathieu-Daudé
2021-03-15target/avr: Fix interrupt executionIvanov Arkasha
2021-03-15target/avr: Fix some comment spelling errorsLichang Zhao
2021-02-20target/avr/cpu: Use device_class_set_parent_realize()Philippe Mathieu-Daudé
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana
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