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2024-01-04Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell
* configure: use a native non-cross compiler for linux-user * meson: cleanups * target/i386: miscellaneous cleanups and optimizations * target/i386: implement CMPccXADD * target/i386: the sgx_epc_get_section stub is reachable * esp: check for NULL result from scsi_device_find() # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmWRImYUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNd7AgAgcyJGiMfUkXqhefplpm06RDXQIa8 # FuoJqPb21lO75DQKfaFRAc4xGLagjJROMJGHMm9HvMu2VlwvOydkQlfFRspENxQ/ # 5XzGdb/X0A7HA/mwUfnMB1AZx0Vs32VI5IBSc6acc9fmgeZ84XQEoM3KBQHUik7X # mSkE4eltR9gJ+4IaGo4voZtK+YoVD8nEcuqmnKihSPWizev0FsZ49aNMtaYa9qC/ # Xs3kiQd/zPibHDHJu0ulFsNZgxtUcvlLHTCf8gO4dHWxCFLXGubMush83McpRtNB # Qoh6cTLH+PBXfrxMR3zmTZMNvo8Euls3s07Y8TkNP4vdIIE/kMeMDW1wJw== # =mq30 # -----END PGP SIGNATURE----- # gpg: Signature made Sun 31 Dec 2023 08:12:22 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits) meson.build: report graphics backends separately configure, meson: rename targetos to host_os meson: rename config_all meson: remove CONFIG_ALL meson: remove config_targetos meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos meson: remove OS definitions from config_targetos meson: always probe u2f and canokey if the option is enabled meson: move subdirs to "Collect sources" section meson: move config-host.h definitions together meson: move CFI detection code with other compiler flags meson: keep subprojects together meson: move accelerator dependency checks together meson: move option validation together meson: move program checks together meson: add more sections to main meson.build configure: unify again the case arms in probe_target_compiler configure: remove unnecessary subshell Makefile: clean qemu-iotests output meson: use version_compare() to compare version ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-31meson: rename config_allPaolo Bonzini
config_all now lists only accelerators, rename it to indicate its actual content. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-12-29target/arm: Constify hvf/hvf.cRichard Henderson
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-4-richard.henderson@linaro.org>
2023-12-29target/arm: Constify VMState in machine.cRichard Henderson
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-3-richard.henderson@linaro.org>
2023-12-19target/arm/helper: Propagate MDCR_EL2.HPMN into PMCR_EL0.NJean-Philippe Brucker
MDCR_EL2.HPMN allows an hypervisor to limit the number of PMU counters available to EL1 and EL0 (to keep the others to itself). QEMU already implements this split correctly, except for PMCR_EL0.N reads: the number of counters read by EL1 or EL0 should be the one configured in MDCR_EL2.HPMN. Cc: qemu-stable@nongnu.org Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20231215144652.4193815-2-jean-philippe@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/tcg: Including missing 'exec/exec-all.h' headerPhilippe Mathieu-Daudé
translate_insn() ends up calling probe_access_full(), itself declared in "exec/exec-all.h": TranslatorOps::translate_insn -> aarch64_tr_translate_insn() -> is_guarded_page() -> probe_access_full() Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231130142519.28417-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accelPhilippe Mathieu-Daudé
Hardware accelerators handle that in *hardware*. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231130142519.28417-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm: Restrict TCG specific helpersPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231130142519.28417-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm: Don't implement *32_EL2 registers when EL1 is AArch64 onlyPeter Maydell
The system registers DBGVCR32_EL2, FPEXC32_EL2, DACR32_EL2 and IFSR32_EL2 are present only to allow an AArch64 EL2 or EL3 to read and write the contents of an AArch32-only system register. The architecture requires that they are present only when EL1 can be AArch32, but we implement them unconditionally. This was OK when all our CPUs supported AArch32 EL1, but we have quite a lot of CPU models now which only support AArch64 at EL1: a64fx cortex-a76 cortex-a710 neoverse-n1 neoverse-n2 neoverse-v1 Only define these registers for CPUs which allow AArch32 EL1. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231121144605.3980419-1-peter.maydell@linaro.org
2023-12-19target/arm/kvm: Have kvm_arm_hw_debug_active take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-17-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_handle_debug take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-16-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_handle_dabt_nisv take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-15-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_verify_ext_dabt_pending take a ARMCPU argPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-14-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_[get|put]_virtual_time take ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-13-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_vcpu_finalize take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-12-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_vcpu_init take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-11-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_pmu_set_irq take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-10-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_pmu_init take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-9-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_pvtime_init take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-8-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_set_device_attr take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-7-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_sve_get_vls take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-6-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_sve_set_vls take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Have kvm_arm_add_vcpu_properties take a ARMCPU argumentPhilippe Mathieu-Daudé
Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-4-philmd@linaro.org [PMM: fix parameter name in doc comment too] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Remove unused includesPhilippe Mathieu-Daudé
Both MemoryRegion and Error types are forward declared in "qemu/typedefs.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231123183518.64569-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport kvm_arm_vm_state_changeRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport and tidy kvm_arm_sync_mpstate_to_{kvm, qemu}Richard Henderson
Drop fprintfs and actually use the return values in the callers. This is OK to do since commit 7191f24c7fcf which added the error-check to the generic accel/kvm functions that eventually call into these ones. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> [PMM: tweak commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport kvm_{get,put}_vcpu_eventsRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Init cap_has_inject_serror_esr in kvm_arch_initRichard Henderson
There is no need to do this in kvm_arch_init_vcpu per vcpu. Inline kvm_arm_init_serror_injection rather than keep separate. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport kvm_arm_init_cpreg_listRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport kvm_arm_vcpu_finalizeRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport kvm_arm_vcpu_initRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Merge kvm64.c into kvm.cRichard Henderson
Since kvm32.c was removed, there is no need to keep them separate. This will allow more symbols to be unexported. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> [PMM: retain copyright lines from kvm64.c in kvm.c] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_reg_syncs_via_cpreg_list and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> [PMM: merged two duplicate comments, as suggested by Gavin] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_cpreg_level and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Use a switch for kvm_arm_cpreg_levelRichard Henderson
Use a switch instead of a linear search through data. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_get_host_cpu_features and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Inline kvm_arm_steal_time_supportedRichard Henderson
This function is only used once, and is quite simple. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Unexport kvm_arm_{get, put}_virtual_timeRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_handle_debug and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_hw_debug_active and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_copy_hw_debug_data and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Move kvm_arm_verify_ext_dabt_pending and unexportRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm/kvm: Merge kvm_arm_init_debug into kvm_arch_initRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-19target/arm: kvm64: remove a redundant KVM_CAP_SET_GUEST_DEBUG probeChao Du
The KVM_CAP_SET_GUEST_DEBUG is probed during kvm_init(). gdbserver will fail to start if the CAP is not supported. So no need to make another probe here, like other targets. Signed-off-by: Chao Du <duchao@eswincomputing.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231025070726.22689-1-duchao@eswincomputing.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-12-04target/arm: Disable SME if SVE is disabledPeter Maydell
There is no architectural requirement that SME implies SVE, but our implementation currently assumes it. (FEAT_SME_FA64 does imply SVE.) So if you try to run a CPU with eg "-cpu max,sve=off" you quickly run into an assert when the guest tries to write to SMCR_EL1: #6 0x00007ffff4b38e96 in __GI___assert_fail (assertion=0x5555566e69cb "sm", file=0x5555566e5b24 "../../target/arm/helper.c", line=6865, function=0x5555566e82f0 <__PRETTY_FUNCTION__.31> "sve_vqm1_for_el_sm") at ./assert/assert.c:101 #7 0x0000555555ee33aa in sve_vqm1_for_el_sm (env=0x555557d291f0, el=2, sm=false) at ../../target/arm/helper.c:6865 #8 0x0000555555ee3407 in sve_vqm1_for_el (env=0x555557d291f0, el=2) at ../../target/arm/helper.c:6871 #9 0x0000555555ee3724 in smcr_write (env=0x555557d291f0, ri=0x555557da23b0, value=2147483663) at ../../target/arm/helper.c:6995 #10 0x0000555555fd1dba in helper_set_cp_reg64 (env=0x555557d291f0, rip=0x555557da23b0, value=2147483663) at ../../target/arm/tcg/op_helper.c:839 #11 0x00007fff60056781 in code_gen_buffer () Avoid this unsupported and slightly odd combination by disabling SME when SVE is not present. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2005 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231127173318.674758-1-peter.maydell@linaro.org
2023-11-27target/arm: Handle overflow in calculation of next timer tickPeter Maydell
In commit edac4d8a168 back in 2015 when we added support for the virtual timer offset CNTVOFF_EL2, we didn't correctly update the timer-recalculation code that figures out when the timer interrupt is next going to change state. We got it wrong in two ways: * for the 0->1 transition, we didn't notice that gt->cval + offset can overflow a uint64_t * for the 1->0 transition, we didn't notice that the transition might now happen before the count rolls over, if offset > count In the former case, we end up trying to set the next interrupt for a time in the past, which results in QEMU hanging as the timer fires continuously. In the latter case, we would fail to update the interrupt status when we are supposed to. Fix the calculations in both cases. The test case is Alex Bennée's from the bug report, and tests the 0->1 transition overflow case. Fixes: edac4d8a168 ("target-arm: Add CNTVOFF_EL2") Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/60 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120173506.3729884-1-peter.maydell@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27target/arm: Set IL bit for pauth, SVE access, BTI trap syndromesPeter Maydell
The syndrome register value always has an IL field at bit 25, which is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32 bit instruction (or for exceptions which aren't traps on a known instruction, like PC alignment faults). This means that our syn_*() functions should always either take an is_16bit argument to determine whether to set the IL bit, or else unconditionally set it. We missed setting the IL bit for the syndrome for three kinds of trap: * an SVE access exception * a pointer authentication check failure * a BTI (branch target identification) check failure All of these traps are AArch64 only, and so the instruction causing the trap is always 64 bit. This means we can unconditionally set the IL bit in the syn_*() function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120150121.3458408-1-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20target/arm: Fix SME FMOPA (16-bit), BFMOPARichard Henderson
Perform the loop increment unconditionally, not nested within the predication. Cc: qemu-stable@nongnu.org Fixes: 3916841ac75 ("target/arm: Implement FMOPA, FMOPS (widening)") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1985 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231117193135.1180657-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20target/arm: enable FEAT_RNG on Neoverse-N2Marcin Juszkiewicz
I noticed that Neoverse-V1 has FEAT_RNG enabled so let enable it also on Neoverse-N2. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231114103443.1652308-1-marcin.juszkiewicz@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-15target/arm/tcg: spelling fixes: alse, addresesMichael Tokarev
Fixes: 179e9a3baccc "target/arm: Define new TB flag for ATA0" Fixes: 5d7b37b5f675 "target/arm: Implement the CPY* instructions" Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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