Age | Commit message (Expand) | Author |
2023-06-06 | target/arm: Use tcg_gen_qemu_{ld, st}_i128 in gen_sve_{ld, st}r | Richard Henderson |
2023-06-06 | target/arm: Use tcg_gen_qemu_st_i128 for STZG, STZ2G | Richard Henderson |
2023-06-06 | target/arm: Use tcg_gen_qemu_{st, ld}_i128 for do_fp_{st, ld} | Richard Henderson |
2023-06-06 | target/arm: Use tcg_gen_qemu_ld_i128 for LDXP | Richard Henderson |
2023-06-06 | target/arm: Introduce finalize_memop_{atom,pair} | Richard Henderson |
2023-06-06 | target/arm: Add feature test for FEAT_LSE2 | Richard Henderson |
2023-06-06 | target/arm: Add commentary for CPUARMState.exclusive_high | Richard Henderson |
2023-06-06 | hvf: add guest debugging handlers for Apple Silicon hosts | Francesco Cagnin |
2023-06-06 | hvf: add breakpoint handlers | Francesco Cagnin |
2023-06-06 | hvf: handle access for more registers | Francesco Cagnin |
2023-06-06 | arm: move KVM breakpoints helpers | Francesco Cagnin |
2023-06-06 | atomics: eliminate mb_read/mb_set | Paolo Bonzini |
2023-06-05 | target/arm: Add missing include of exec/exec-all.h | Richard Henderson |
2023-06-05 | target/arm: Tidy helpers for translation | Richard Henderson |
2023-06-05 | accel/tcg: Introduce translator_io_start | Richard Henderson |
2023-06-05 | tcg: Split helper-proto.h | Richard Henderson |
2023-06-05 | tcg: Split helper-gen.h | Richard Henderson |
2023-06-05 | tcg: Pass TCGHelperInfo to tcg_gen_callN | Richard Henderson |
2023-06-05 | target/arm: Include helper-gen.h in translator.h | Richard Henderson |
2023-06-05 | tcg: Split out tcg/oversized-guest.h | Richard Henderson |
2023-06-05 | target/arm: Fix test of TCG_OVERSIZED_GUEST | Richard Henderson |
2023-05-30 | target/arm: Explain why we need to select ARM_V7M | Fabiano Rosas |
2023-05-30 | target/arm: Explicitly select short-format FSR for M-profile | Peter Maydell |
2023-05-23 | accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu | Richard Henderson |
2023-05-19 | Revert "arm/kvm: add support for MTE" | Peter Maydell |
2023-05-18 | target/arm: Saturate L2CTLR_EL1 core count field rather than overflowing | Peter Maydell |
2023-05-18 | target/arm: Convert ERET, ERETAA, ERETAB to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert BR, BLR, RET to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert conditional branch insns to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert TBZ, TBNZ to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert CBZ, CBNZ to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert unconditional branch immediate to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert Extract instructions to decodetree | Peter Maydell |
2023-05-18 | target/arm: Convert Bitfield to decodetree | Richard Henderson |
2023-05-18 | target/arm: Convert Move wide (immediate) to decodetree | Richard Henderson |
2023-05-18 | target/arm: Convert Logical (immediate) to decodetree | Richard Henderson |
2023-05-18 | target/arm: Replace bitmask64 with MAKE_64BIT_MASK | Richard Henderson |
2023-05-18 | target/arm: Convert Add/subtract (immediate with tags) to decodetree | Richard Henderson |
2023-05-18 | target/arm: Convert Add/subtract (immediate) to decodetree | Richard Henderson |
2023-05-18 | target/arm: Split gen_add_CC and gen_sub_CC | Richard Henderson |
2023-05-18 | target/arm: Convert PC-rel addressing to decodetree | Richard Henderson |
2023-05-18 | target/arm: Pull calls to disas_sve() and disas_sme() out of legacy decoder | Peter Maydell |
2023-05-18 | target/arm: Create decodetree skeleton for A64 | Peter Maydell |
2023-05-18 | target/arm: Split out disas_a64_legacy | Richard Henderson |
2023-05-18 | target/arm: add RAZ/WI handling for DBGDTR[TX|RX] | Alex Bennée |
2023-05-18 | arm/kvm: add support for MTE | Cornelia Huck |
2023-05-18 | target/arm: Fix vd == vm overlap in sve_ldff1_z | Richard Henderson |
2023-05-12 | target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check | Peter Maydell |