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QEMU is a generic and open source machine & userspace emulator and virtualizer
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arm
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2023-05-12
target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check
Peter Maydell
2023-05-12
target/arm: Select CONFIG_ARM_V7M when TCG is enabled
Fabiano Rosas
2023-05-12
target/arm: Select SEMIHOSTING when using TCG
Fabiano Rosas
2023-05-12
target/arm: Fix handling of SW and NSW bits for stage 2 walks
Peter Maydell
2023-05-12
target/arm: Don't allow stage 2 page table walks to downgrade to NS
Peter Maydell
2023-05-12
target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/
Richard Henderson
2023-05-12
target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/
Richard Henderson
2023-05-02
target/arm: Add compile time asserts to load/store_cpu_field macros
Peter Maydell
2023-05-02
target/arm: Define and use new load_cpu_field_low32()
Peter Maydell
2023-05-02
arm/Kconfig: Always select SEMIHOSTING when TCG is present
Fabiano Rosas
2023-05-02
target/arm: move cpu_tcg to tcg/cpu32.c
Claudio Fontana
2023-05-02
target/arm: Move 64-bit TCG CPUs into tcg/
Fabiano Rosas
2023-05-02
target/arm: Do not expose all -cpu max features to qtests
Fabiano Rosas
2023-05-02
target/arm: Extract TCG -cpu max code into a function
Fabiano Rosas
2023-05-02
target/arm: Remove dead code from cpu_max_set_sve_max_vq
Fabiano Rosas
2023-05-02
target/arm: Move cortex sysregs into a separate file
Fabiano Rosas
2023-04-20
target/arm: Report pauth information to gdb as 'pauth_v2'
Peter Maydell
2023-04-20
target/arm: Implement FEAT_PAN3
Peter Maydell
2023-04-20
target/arm: Don't set ISV when reporting stage 1 faults in ESR_EL2
Peter Maydell
2023-04-20
target/arm: Pass ARMMMUFaultInfo to merge_syn_data_abort()
Peter Maydell
2023-04-20
target/arm: Initialize debug capabilities only once
Akihiko Odaki
2023-04-20
target/arm: Remove KVM AArch32 CPU definitions
Philippe Mathieu-Daudé
2023-04-10
target/arm: Copy guarded bit in combine_cacheattrs
Richard Henderson
2023-04-10
target/arm: PTE bit GP only applies to stage1
Richard Henderson
2023-04-03
target/arm: Fix generated code for cpreg reads when HSTR is active
Peter Maydell
2023-04-03
target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()
Philippe Mathieu-Daudé
2023-03-28
softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel
Philippe Mathieu-Daudé
2023-03-28
target/arm/gdbstub: Only advertise M-profile features if TCG available
Philippe Mathieu-Daudé
2023-03-21
target/arm: Don't advertise aarch64-pauth.xml to gdb
Peter Maydell
2023-03-21
target/arm: Add Neoverse-N1 registers
Chen Baozi
2023-03-13
target/arm: Avoid tcg_const_ptr in handle_rev
Richard Henderson
2023-03-13
target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn
Richard Henderson
2023-03-13
target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn
Richard Henderson
2023-03-13
target/arm: Avoid tcg_const_* in translate-mve.c
Richard Henderson
2023-03-13
target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
Richard Henderson
2023-03-13
target/arm: Improve trans_BFCI
Richard Henderson
2023-03-13
target/arm: Create gen_set_rmode, gen_restore_rmode
Richard Henderson
2023-03-13
target/arm: Consistently use ARMFPRounding during translation
Richard Henderson
2023-03-13
target/arm: Improve arm_rmode_to_sf
Richard Henderson
2023-03-13
target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf
Richard Henderson
2023-03-13
target/arm: Use rmode >= 0 for need_rmode
Richard Henderson
2023-03-13
target/arm: Remove `NB_MMU_MODES` define
Anton Johansson
2023-03-07
gdbstub: move register helpers into standalone include
Alex Bennée
2023-03-06
target/arm: Rewrite check_s2_mmu_setup
Richard Henderson
2023-03-06
target/arm: Diagnose incorrect usage of arm_is_secure subroutines
Richard Henderson
2023-03-06
target/arm: Stub arm_hcr_el2_eff for m-profile
Richard Henderson
2023-03-06
target/arm: Handle m-profile in arm_is_secure
Richard Henderson
2023-03-06
target/arm: Implement gdbstub m-profile systemreg and secext
Richard Henderson
2023-03-06
target/arm: Export arm_v7m_get_sp_ptr
David Reiss
2023-03-06
target/arm: Export arm_v7m_mrs_control
David Reiss
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