Age | Commit message (Expand) | Author |
2017-03-14 | target/arm/arm-powerctl: Fix psci info return values | Andrew Jones |
2017-03-14 | target/arm: implement armv8 PMUSERENR (user-mode enable bits) | Andrew Baumann |
2017-03-09 | target/arm/helper: make it clear the EC field is also in hex | Alex Bennée |
2017-03-03 | KVM: do not use sigtimedwait to catch SIGBUS | Paolo Bonzini |
2017-03-03 | KVM: remove kvm_arch_on_sigbus | Paolo Bonzini |
2017-02-28 | target-arm: Add GICv3CPUState in CPUARMState struct | Vijaya Kumar K |
2017-02-28 | armv7m: Raise correct kind of UsageFault for attempts to execute ARM code | Peter Maydell |
2017-02-28 | armv7m: Check exception return consistency | Peter Maydell |
2017-02-28 | armv7m: Extract "exception taken" code into functions | Peter Maydell |
2017-02-28 | armv7m: Simpler and faster exception start | Michael Davidsaver |
2017-02-28 | armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value | Peter Maydell |
2017-02-28 | armv7m: Escalate exceptions to HardFault if necessary | Michael Davidsaver |
2017-02-28 | armv7m: Fix condition check for taking exceptions | Peter Maydell |
2017-02-28 | Add missing fp_access_check() to aarch64 crypto instructions | Nick Reilly |
2017-02-24 | tcg: enable MTTCG by default for ARM on x86 hosts | Alex Bennée |
2017-02-24 | target-arm: ensure all cross vCPUs TLB flushes complete | Alex Bennée |
2017-02-24 | target-arm: don't generate WFE/YIELD calls for MTTCG | Alex Bennée |
2017-02-24 | target-arm/powerctl: defer cpu reset work to CPU context | Alex Bennée |
2017-02-24 | cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap | Alex Bennée |
2017-02-24 | tcg: drop global lock during TCG code execution | Jan Kiszka |
2017-02-10 | target-arm: Enable vPMU support under TCG mode | Wei Huang |
2017-02-10 | target-arm: Add support for PMU register PMINTENSET_EL1 | Wei Huang |
2017-02-10 | target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0 | Wei Huang |
2017-02-10 | target-arm: Add support for PMU register PMSELR_EL0 | Wei Huang |
2017-02-07 | target/arm: A32, T32: Create Instruction Syndromes for Data Aborts | Peter Maydell |
2017-02-07 | target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode | Peter Maydell |
2017-02-07 | arm: Correctly handle watchpoints for BE32 CPUs | Julian Brown |
2017-02-07 | Fix Thumb-1 BE32 execution and disassembly. | Julian Brown |
2017-02-07 | target/arm: Add cfgend parameter for ARM CPU selection. | Julian Brown |
2017-02-01 | arm: add trailing ; after MISMATCH_CHECK | Michael S. Tsirkin |
2017-02-01 | arm: better stub version for MISMATCH_CHECK | Michael S. Tsirkin |
2017-01-27 | armv7m: R14 should reset to 0xffffffff | Peter Maydell |
2017-01-27 | armv7m: FAULTMASK should be 0 on reset | Michael Davidsaver |
2017-01-27 | armv7m: Report no-coprocessor faults correctly | Peter Maydell |
2017-01-27 | armv7m: set CFSR.UNDEFINSTR on undefined instructions | Michael Davidsaver |
2017-01-27 | armv7m: honour CCR.STACKALIGN on exception entry | Michael Davidsaver |
2017-01-27 | armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR | Peter Maydell |
2017-01-27 | target/arm: Drop IS_M() macro | Peter Maydell |
2017-01-27 | armv7m: Clear FAULTMASK on return from non-NMI exceptions | Michael Davidsaver |
2017-01-27 | armv7m: Fix reads of CONTROL register bit 1 | Michael Davidsaver |
2017-01-27 | armv7m: Explicit error for bad vector table | Michael Davidsaver |
2017-01-27 | armv7m: Replace armv7m.hack with unassigned_access handler | Michael Davidsaver |
2017-01-27 | armv7m: MRS/MSR: handle unprivileged access | Michael Davidsaver |
2017-01-24 | migration: extend VMStateInfo | Jianjun Duan |
2017-01-20 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell |
2017-01-20 | target-arm: Enable EL2 feature bit on A53 and A57 | Peter Maydell |
2017-01-20 | target/arm/psci.c: If EL2 implemented, start CPUs in EL2 | Peter Maydell |
2017-01-20 | target-arm: Add ARMCPU fields for GIC CPU i/f config | Peter Maydell |
2017-01-20 | target-arm: Expose output GPIO line for VCPU maintenance interrupt | Peter Maydell |
2017-01-20 | target/arm: Implement DBGVCR32_EL2 system register | Peter Maydell |