aboutsummaryrefslogtreecommitdiff
path: root/target/arm
AgeCommit message (Expand)Author
2019-10-15target/arm/arm-semi: Implement SH_EXT_STDOUT_STDERR extensionPeter Maydell
2019-10-15target/arm/arm-semi: Implement SH_EXT_EXIT_EXTENDED extensionPeter Maydell
2019-10-15target/arm/arm-semi: Implement support for semihosting feature detectionPeter Maydell
2019-10-15target/arm/arm-semi: Factor out implementation of SYS_FLENPeter Maydell
2019-10-15target/arm/arm-semi: Factor out implementation of SYS_SEEKPeter Maydell
2019-10-15target/arm/arm-semi: Factor out implementation of SYS_ISTTYPeter Maydell
2019-10-15target/arm/arm-semi: Factor out implementation of SYS_READPeter Maydell
2019-10-15target/arm/arm-semi: Factor out implementation of SYS_WRITEPeter Maydell
2019-10-15target/arm/arm-semi: Factor out implementation of SYS_CLOSEPeter Maydell
2019-10-15target/arm/arm-semi: Use set_swi_errno() in gdbstub callback functionsPeter Maydell
2019-10-15target/arm/arm-semi: Restrict use of TaskState*Peter Maydell
2019-10-15target/arm/arm-semi: Make semihosting code hand out its own file descriptorsPeter Maydell
2019-10-15target/arm/arm-semi: Correct comment about gdb syscall racesPeter Maydell
2019-10-15target/arm/arm-semi: Always set some kind of errno for failed callsPeter Maydell
2019-10-15target/arm/arm-semi: Capture errno in softmmu version of set_swi_errno()Peter Maydell
2019-10-15ARM: KVM: Check KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 for smp_cpus > 256Eric Auger
2019-10-15intc/arm_gic: Support IRQ injection for more than 256 vpusEric Auger
2019-09-27target/arm: remove run time semihosting checksAlex Bennée
2019-09-27target/arm: handle A-profile semihosting at translate timeAlex Bennée
2019-09-27target/arm: handle M-profile semihosting at translate timeAlex Bennée
2019-09-27target/arm: fix CBAR register for AArch64 CPUsLuc Michel
2019-09-05target/arm: Inline gen_bx_im into callersRichard Henderson
2019-09-05target/arm: Clean up disas_thumb_insnRichard Henderson
2019-09-05target/arm: Convert T16, long branchesRichard Henderson
2019-09-05target/arm: Convert T16, Unconditional branchRichard Henderson
2019-09-05target/arm: Convert T16, load (literal)Richard Henderson
2019-09-05target/arm: Convert T16, shift immediateRichard Henderson
2019-09-05target/arm: Convert T16, Miscellaneous 16-bit instructionsRichard Henderson
2019-09-05target/arm: Convert T16, Conditional branches, Supervisor callRichard Henderson
2019-09-05target/arm: Convert T16, push and popRichard Henderson
2019-09-05target/arm: Split gen_nop_hintRichard Henderson
2019-09-05target/arm: Convert T16, nop hintsRichard Henderson
2019-09-05target/arm: Convert T16, Reverse bytesRichard Henderson
2019-09-05target/arm: Convert T16, Change processor stateRichard Henderson
2019-09-05target/arm: Convert T16, extractRichard Henderson
2019-09-05target/arm: Convert T16 adjust sp (immediate)Richard Henderson
2019-09-05target/arm: Convert T16 add, compare, move (two high registers)Richard Henderson
2019-09-05target/arm: Convert T16 branch and exchangeRichard Henderson
2019-09-05target/arm: Convert T16 one low register and immediateRichard Henderson
2019-09-05target/arm: Convert T16 add/sub (3 low, 2 low and imm)Richard Henderson
2019-09-05target/arm: Convert T16 load/store multipleRichard Henderson
2019-09-05target/arm: Convert T16 add pc/sp (immediate)Richard Henderson
2019-09-05target/arm: Convert T16 load/store (immediate offset)Richard Henderson
2019-09-05target/arm: Convert T16 load/store (register offset)Richard Henderson
2019-09-05target/arm: Convert T16 data-processing (two low regs)Richard Henderson
2019-09-05target/arm: Add skeleton for T16 decodetreeRichard Henderson
2019-09-05target/arm: Simplify disas_arm_insnRichard Henderson
2019-09-05target/arm: Simplify disas_thumb2_insnRichard Henderson
2019-09-05target/arm: Convert TTRichard Henderson
2019-09-05target/arm: Convert SGRichard Henderson