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AgeCommit message (Expand)Author
2021-08-25target/arm: Implement MVE VMLASPeter Maydell
2021-08-25target/arm: Implement MVE VPSELPeter Maydell
2021-08-25target/arm: Implement MVE integer vector-vs-scalar comparisonsPeter Maydell
2021-08-25target/arm: Implement MVE integer vector comparisonsPeter Maydell
2021-08-25target/arm: Factor out gen_vpst()Peter Maydell
2021-08-25target/arm: Implement MVE incrementing/decrementing dup insnsPeter Maydell
2021-08-25target/arm: Implement MVE VMULL (polynomial)Peter Maydell
2021-08-25target/arm: Fix VLDRB/H/W for predicated elementsPeter Maydell
2021-08-25target/arm: Fix VPT advance when ECI is non-zeroPeter Maydell
2021-08-25target/arm: Factor out mve_eci_mask()Peter Maydell
2021-08-25target/arm: Fix calculation of LTP mask when LR is 0Peter Maydell
2021-08-25target/arm: Fix MVE 48-bit SQRSHRL for small right shiftsPeter Maydell
2021-08-25target/arm: Fix 48-bit saturating shiftsPeter Maydell
2021-08-25target/arm: Fix mask handling for MVE narrowing operationsPeter Maydell
2021-08-25target/arm: Fix signed VADDVPeter Maydell
2021-08-25target/arm: Fix MVE VSLI by 0 and VSRI by <dt>Peter Maydell
2021-08-25target/arm: Print MVE VPR in CPU dumpsPeter Maydell
2021-08-25target/arm: Note that we handle VMOVL as a special case of VSHLLPeter Maydell
2021-07-27target/arm: Add sve-default-vector-length cpu propertyRichard Henderson
2021-07-27target/arm: Export aarch64_sve_zcr_get_valid_lenRichard Henderson
2021-07-27target/arm: Correctly bound length in sve_zcr_get_valid_lenRichard Henderson
2021-07-27target/arm: Report M-profile alignment faults correctly to the guestPeter Maydell
2021-07-27target/arm: Add missing 'return's after calling v7m_exception_taken()Peter Maydell
2021-07-27target/arm: Enforce that M-profile SP low 2 bits are always zeroPeter Maydell
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson
2021-07-21target/arm: Implement debug_check_breakpointRichard Henderson
2021-07-21tcg: Rename helper_atomic_*_mmu and provide for user-onlyRichard Henderson
2021-07-18target/arm: Remove duplicate 'plus1' function from Neon and SVE decodePeter Maydell
2021-07-18target/arm: Fix offsets for TTBCRRichard Henderson
2021-07-12Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell
2021-07-11Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell
2021-07-09target/arm: Use translator_use_goto_tb for aarch32Richard Henderson
2021-07-09target/arm: Use translator_use_goto_tb for aarch64Richard Henderson
2021-07-09target/arm: Use DISAS_TOO_MANY for ISB and SBRichard Henderson
2021-07-09tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé
2021-07-09meson: Introduce target-specific KconfigPhilippe Mathieu-Daudé
2021-07-09target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRinthnick@vmware.com
2021-07-02target/arm: Implement MVE shifts by registerPeter Maydell
2021-07-02target/arm: Implement MVE shifts by immediatePeter Maydell
2021-07-02target/arm: Implement MVE long shifts by registerPeter Maydell
2021-07-02target/arm: Implement MVE long shifts by immediatePeter Maydell
2021-07-02target/arm: Implement MVE VADDLVPeter Maydell
2021-07-02target/arm: Implement MVE VSHLCPeter Maydell
2021-07-02target/arm: Implement MVE saturating narrowing shiftsPeter Maydell
2021-07-02target/arm: Implement MVE VSHRN, VRSHRNPeter Maydell
2021-07-02target/arm: Implement MVE VSRI, VSLIPeter Maydell
2021-07-02target/arm: Implement MVE VSHLLPeter Maydell
2021-07-02target/arm: Implement MVE vector shift right by immediate insnsPeter Maydell
2021-07-02target/arm: Implement MVE vector shift left by immediate insnsPeter Maydell
2021-07-02target/arm: Implement MVE logical immediate insnsPeter Maydell
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