| Age | Commit message (Expand) | Author |
|---|
| 2017-02-07 | target/arm: A32, T32: Create Instruction Syndromes for Data Aborts | Peter Maydell |
| 2017-02-07 | target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode | Peter Maydell |
| 2017-02-07 | arm: Correctly handle watchpoints for BE32 CPUs | Julian Brown |
| 2017-02-07 | Fix Thumb-1 BE32 execution and disassembly. | Julian Brown |
| 2017-02-07 | target/arm: Add cfgend parameter for ARM CPU selection. | Julian Brown |
| 2017-02-01 | arm: add trailing ; after MISMATCH_CHECK | Michael S. Tsirkin |
| 2017-02-01 | arm: better stub version for MISMATCH_CHECK | Michael S. Tsirkin |
| 2017-01-27 | armv7m: R14 should reset to 0xffffffff | Peter Maydell |
| 2017-01-27 | armv7m: FAULTMASK should be 0 on reset | Michael Davidsaver |
| 2017-01-27 | armv7m: Report no-coprocessor faults correctly | Peter Maydell |
| 2017-01-27 | armv7m: set CFSR.UNDEFINSTR on undefined instructions | Michael Davidsaver |
| 2017-01-27 | armv7m: honour CCR.STACKALIGN on exception entry | Michael Davidsaver |
| 2017-01-27 | armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR | Peter Maydell |
| 2017-01-27 | target/arm: Drop IS_M() macro | Peter Maydell |
| 2017-01-27 | armv7m: Clear FAULTMASK on return from non-NMI exceptions | Michael Davidsaver |
| 2017-01-27 | armv7m: Fix reads of CONTROL register bit 1 | Michael Davidsaver |
| 2017-01-27 | armv7m: Explicit error for bad vector table | Michael Davidsaver |
| 2017-01-27 | armv7m: Replace armv7m.hack with unassigned_access handler | Michael Davidsaver |
| 2017-01-27 | armv7m: MRS/MSR: handle unprivileged access | Michael Davidsaver |
| 2017-01-24 | migration: extend VMStateInfo | Jianjun Duan |
| 2017-01-20 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell |
| 2017-01-20 | target-arm: Enable EL2 feature bit on A53 and A57 | Peter Maydell |
| 2017-01-20 | target/arm/psci.c: If EL2 implemented, start CPUs in EL2 | Peter Maydell |
| 2017-01-20 | target-arm: Add ARMCPU fields for GIC CPU i/f config | Peter Maydell |
| 2017-01-20 | target-arm: Expose output GPIO line for VCPU maintenance interrupt | Peter Maydell |
| 2017-01-20 | target/arm: Implement DBGVCR32_EL2 system register | Peter Maydell |
| 2017-01-20 | target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32() | Peter Maydell |
| 2017-01-19 | kvm: move cpu synchronization code | Vincent Palatin |
| 2017-01-16 | Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-... | Peter Maydell |
| 2017-01-13 | target/arm: Fix ubfx et al for aarch64 | Richard Henderson |
| 2017-01-13 | Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ... | Peter Maydell |
| 2017-01-13 | cputlb: drop flush_global flag from tlb_flush | Alex Bennée |
| 2017-01-13 | qom/cpu: move tlb_flush to cpu_common_reset | Alex Bennée |
| 2017-01-12 | qmp: Report QOM type name on query-cpu-definitions | Eduardo Habkost |
| 2017-01-10 | target-arm: Use clrsb helper | Richard Henderson |
| 2017-01-10 | target-arm: Use clz opcode | Richard Henderson |
| 2017-01-10 | target-arm: Use new deposit and extract ops | Richard Henderson |
| 2016-12-27 | target-arm: Add VBAR support to ARM1176 CPUs | Cédric Le Goater |
| 2016-12-27 | target-arm: Log AArch64 exception returns | Peter Maydell |
| 2016-12-27 | target-arm: Fix aarch64 disas_ldst_single_struct | Richard Henderson |
| 2016-12-27 | target-arm: Fix aarch64 vec_reg_offset | Richard Henderson |
| 2016-12-27 | Correct value of ARM Cortex-A8 MVFR1 register. | Julian Brown |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |
