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QEMU is a generic and open source machine & userspace emulator and virtualizer
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arm
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2021-02-11
target/arm: Correctly initialize MDCR_EL2.HPMN
Daniel Müller
2021-02-11
target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU
Rebecca Cran
2021-02-11
target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU
Rebecca Cran
2021-02-11
target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate
Rebecca Cran
2021-02-11
target/arm: Add support for FEAT_DIT, Data Independent Timing
Rebecca Cran
2021-02-11
target/arm: Fix SCR RES1 handling
Mike Nawrocki
2021-02-11
target/arm: Don't migrate CPUARMState.features
Aaron Lindsay
2021-02-05
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
Claudio Fontana
2021-02-05
cpu: move debug_check_watchpoint to tcg_ops
Claudio Fontana
2021-02-05
cpu: move adjust_watchpoint_address to tcg_ops
Claudio Fontana
2021-02-05
cpu: move do_unaligned_access to tcg_ops
Claudio Fontana
2021-02-05
cpu: move cc->transaction_failed to tcg_ops
Claudio Fontana
2021-02-05
cpu: move cc->do_interrupt to tcg_ops
Claudio Fontana
2021-02-05
target/arm: do not use cc->do_interrupt for KVM directly
Claudio Fontana
2021-02-05
cpu: Move debug_excp_handler to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Move tlb_fill to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Move cpu_exec_* to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Move synchronize_from_tb() to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Introduce TCGCpuOperations struct
Eduardo Habkost
2021-01-29
target/arm: Replace magic value by MMU_DATA_LOAD definition
Philippe Mathieu-Daudé
2021-01-29
target/arm: Conditionalize DBGDIDR
Richard Henderson
2021-01-29
target/arm: Implement ID_PFR2
Richard Henderson
2021-01-19
target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
Philippe Mathieu-Daudé
2021-01-19
target/arm: Update REV, PUNPK for pred_desc
Richard Henderson
2021-01-19
target/arm: Update ZIP, UZP, TRN for pred_desc
Richard Henderson
2021-01-19
target/arm: Update PFIRST, PNEXT for pred_desc
Richard Henderson
2021-01-19
target/arm: Introduce PREDDESC field definitions
Richard Henderson
2021-01-19
target/arm: refactor vae1_tlbmask()
Rémi Denis-Courmont
2021-01-19
target/arm: enable Secure EL2 in max CPU
Rémi Denis-Courmont
2021-01-19
target/arm: Implement SCR_EL2.EEL2
Rémi Denis-Courmont
2021-01-19
target/arm: revector to run-time pick target EL
Rémi Denis-Courmont
2021-01-19
target/arm: set HPFAR_EL2.NS on secure stage 2 faults
Rémi Denis-Courmont
2021-01-19
target/arm: secure stage 2 translation regime
Rémi Denis-Courmont
2021-01-19
target/arm: generalize 2-stage page-walk condition
Rémi Denis-Courmont
2021-01-19
target/arm: translate NS bit in page-walks
Rémi Denis-Courmont
2021-01-19
target/arm: do S1_ptw_translate() before address space lookup
Rémi Denis-Courmont
2021-01-19
target/arm: handle VMID change in secure state
Rémi Denis-Courmont
2021-01-19
target/arm: add ARMv8.4-SEL2 system registers
Rémi Denis-Courmont
2021-01-19
target/arm: add MMU stage 1 for Secure EL2
Rémi Denis-Courmont
2021-01-19
target/arm: add 64-bit S-EL2 to EL exception table
Rémi Denis-Courmont
2021-01-19
target/arm: Define isar_feature function to test for presence of SEL2
Rémi Denis-Courmont
2021-01-19
target/arm: factor MDCR_EL2 common handling
Rémi Denis-Courmont
2021-01-19
target/arm: use arm_hcr_el2_eff() where applicable
Rémi Denis-Courmont
2021-01-19
target/arm: use arm_is_el2_enabled() where applicable
Rémi Denis-Courmont
2021-01-19
target/arm: add arm_is_el2_enabled() helper
Rémi Denis-Courmont
2021-01-19
target/arm: remove redundant tests
Rémi Denis-Courmont
2021-01-19
target/arm: Use object_property_add_bool for "sve" property
Richard Henderson
2021-01-19
target/arm: Add cpu properties to control pauth
Richard Henderson
2021-01-19
target/arm: Implement an IMPDEF pauth algorithm
Richard Henderson
2021-01-18
semihosting: Change common-semi API to be architecture-independent
Keith Packard
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