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QEMU is a generic and open source machine & userspace emulator and virtualizer
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arm
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Author
2017-10-06
target/arm: Add v8M support to exception entry code
Peter Maydell
2017-10-06
target/arm: Add support for restoring v8M additional state context
Peter Maydell
2017-10-06
target/arm: Update excret sanity checks for v8M
Peter Maydell
2017-10-06
target/arm: Add new-in-v8M SFSR and SFAR
Peter Maydell
2017-10-06
target/arm: Don't warn about exception return with PC low bit set for v8M
Peter Maydell
2017-10-06
target/arm: Warn about restoring to unaligned stack
Peter Maydell
2017-10-06
target/arm: Check for xPSR mismatch usage faults earlier for v8M
Peter Maydell
2017-10-06
target/arm: Restore SPSEL to correct CONTROL register on exception return
Peter Maydell
2017-10-06
target/arm: Restore security state on exception return
Peter Maydell
2017-10-06
target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode
Peter Maydell
2017-10-06
target/arm: Don't switch to target stack early in v7M exception return
Peter Maydell
2017-10-06
arm: Fix SMC reporting to EL2 when QEMU provides PSCI
Jan Kiszka
2017-09-27
migration: pre_save return int
Dr. David Alan Gilbert
2017-09-23
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
2017-09-22
memory: Get rid of address_space_init_shareable
Alexey Kardashevskiy
2017-09-21
target/arm: Remove out of date ARM ARM section references in A64 decoder
Peter Maydell
2017-09-21
nvic: Support banked exceptions in acknowledge and complete
Peter Maydell
2017-09-21
target/arm: Handle banking in negative-execution-priority check in cpu_mmu_in...
Peter Maydell
2017-09-21
nvic: Make set_pending and clear_pending take a secure parameter
Peter Maydell
2017-09-21
nvic: Implement AIRCR changes for v8M
Peter Maydell
2017-09-21
target/arm: Implement MSR/MRS access to NS banked registers
Peter Maydell
2017-09-19
arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly
Igor Mammedov
2017-09-14
target/arm: Avoid an extra temporary for store_exclusive
Richard Henderson
2017-09-14
AArch64: Fix single stepping of ERET instruction
Jaroslaw Pelczar
2017-09-14
target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()
Peter Maydell
2017-09-14
target/arm: Add and use defines for EXCRET constants
Peter Maydell
2017-09-14
target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit()
Peter Maydell
2017-09-14
target/arm: Get PRECISERR and IBUSERR the right way round
Peter Maydell
2017-09-14
target/arm: Clear exclusive monitor on v7M reset, exception entry/exit
Peter Maydell
2017-09-14
target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2
Peter Maydell
2017-09-14
hmp: fix "dump-quest-memory" segfault (arm)
Laurent Vivier
2017-09-07
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907'...
Peter Maydell
2017-09-07
target/arm: Add Jazelle feature
Portia Stephens
2017-09-07
target/arm: Implement new do_transaction_failed hook
Peter Maydell
2017-09-07
target/arm: Implement BXNS, and banked stack pointers
Peter Maydell
2017-09-07
target/arm: Move regime_is_secure() to target/arm/internals.h
Peter Maydell
2017-09-07
target/arm: Make CFSR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MMFAR banked for v8M
Peter Maydell
2017-09-07
target/arm: Make CCR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_CTRL register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_RNR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M
Peter Maydell
2017-09-07
target/arm: Make VTOR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make CONTROL register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make FAULTMASK register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make PRIMASK register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make BASEPRI register banked for v8M
Peter Maydell
2017-09-07
target/arm: Add MMU indexes for secure v8M
Peter Maydell
2017-09-07
target/arm: Register second AddressSpace for secure v8M CPUs
Peter Maydell
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