slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2023-02-27	target/cpu: Restrict do_transaction_failed() handlers to sysemu	Philippe Mathieu-Daudé
2023-02-27	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	Philippe Mathieu-Daudé
2023-02-27	target/arm: Don't access TCG code when debugging with KVM	Fabiano Rosas
2023-02-27	target/arm: Move regime_using_lpae_format into internal.h	Fabiano Rosas
2023-02-27	target/arm: Move hflags code into the tcg directory	Fabiano Rosas
2023-02-27	target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled	Fabiano Rosas
2023-02-27	target/arm: Move psci.c into the tcg directory	Claudio Fontana
2023-02-27	target/arm: move helpers to tcg/	Claudio Fontana
2023-02-27	target/arm: move translate modules to tcg/	Fabiano Rosas
2023-02-27	target/arm: Wrap TCG-only code in debug_helper.c	Fabiano Rosas
2023-02-27	target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled	Fabiano Rosas
2023-02-16	target/arm: Move cpregs code out of cpu.h	Fabiano Rosas
2023-02-16	target/arm: Move PC alignment check	Fabiano Rosas
2023-02-16	target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()	Claudio Fontana
2023-02-16	target/arm: wrap psci call with tcg_enabled	Claudio Fontana
2023-02-16	target/arm: rename handle_semihosting to tcg_handle_semihosting	Claudio Fontana
2023-02-16	target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h'	Philippe Mathieu-Daudé
2023-02-16	target/arm: Store CPUARMState::nvic as NVICState*	Philippe Mathieu-Daudé
2023-02-16	target/arm: Restrict CPUARMState::nvic to sysemu	Philippe Mathieu-Daudé
2023-02-16	target/arm: Restrict CPUARMState::arm_boot_info to sysemu	Philippe Mathieu-Daudé
2023-02-16	target/arm: Restrict CPUARMState::gicv3state to sysemu	Philippe Mathieu-Daudé
2023-02-16	target/arm: Avoid resetting CPUARMState::eabi field	Philippe Mathieu-Daudé
2023-02-16	target/arm: Convert CPUARMState::eabi to boolean	Philippe Mathieu-Daudé
2023-02-16	target/arm: Constify ID_PFR1 on user emulation	Philippe Mathieu-Daudé
2023-02-16	target/arm: Reduce arm_v7m_mmu_idx_[all/for_secstate_and_priv]() scope	Philippe Mathieu-Daudé
2023-02-16	target/arm: Simplify arm_v7m_mmu_idx_for_secstate() for user emulation	Philippe Mathieu-Daudé
2023-02-04	target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP	Richard Henderson
2023-02-04	target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXP	Richard Henderson
2023-02-03	target/arm: Enable FEAT_FGT on '-cpu max'	Peter Maydell
2023-02-03	target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps	Peter Maydell
2023-02-03	target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps	Peter Maydell
2023-02-03	target/arm: Implement the HFGITR_EL2.ERET trap	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 48..63	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 18..47	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 12..17	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGITR bits 0..11	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HDFGRTR bits 12..63	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HDFGRTR bits 0..11	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 36..63	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 24..35	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 12..23	Peter Maydell
2023-02-03	target/arm: Mark up sysregs for HFGRTR bits 0..11	Peter Maydell
2023-02-03	target/arm: Implement FGT trapping infrastructure	Peter Maydell
2023-02-03	target/arm: Define the FEAT_FGT registers	Peter Maydell
2023-02-03	target/arm: Disable HSTR_EL2 traps if EL2 is not enabled	Peter Maydell
2023-02-03	target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1	Peter Maydell
2023-02-03	target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps	Peter Maydell
2023-02-03	target/arm: Move do_coproc_insn() syndrome calculation earlier	Peter Maydell
2023-02-03	target/arm: Remove CP_ACCESS_TRAP_UNCATEGORIZED_{EL2, EL3}	Peter Maydell
2023-02-03	target/arm: Correct syndrome for ATS12NSO* at Secure EL1	Peter Maydell