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QEMU is a generic and open source machine & userspace emulator and virtualizer
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Author
2018-10-24
target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set
Peter Maydell
2018-10-24
target/arm: Implement HCR.DC
Peter Maydell
2018-10-24
target/arm: Implement HCR.FB
Peter Maydell
2018-10-24
target/arm: Make switch_mode() file-local
Peter Maydell
2018-10-24
target/arm: Improve debug logging of AArch32 exception return
Peter Maydell
2018-10-24
target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 test
Richard Henderson
2018-10-24
target/arm: Convert sve from feature bit to aa64pfr0 test
Richard Henderson
2018-10-24
target/arm: Convert jazelle from feature bit to isar1 test
Richard Henderson
2018-10-24
target/arm: Convert division from feature bits to isar0 tests
Richard Henderson
2018-10-24
target/arm: Convert v8 extensions from feature bits to isar tests
Richard Henderson
2018-10-24
target/arm: V8M should not imply V7VE
Richard Henderson
2018-10-24
target/arm: Move some system registers into a substructure
Richard Henderson
2018-10-24
target/arm: Add support for VCPU event states
Dongjiu Geng
2018-10-18
target/arm: Check HAVE_CMPXCHG128 at translate time
Richard Henderson
2018-10-18
target/arm: Convert to HAVE_CMPXCHG128
Richard Henderson
2018-10-16
target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
Peter Maydell
2018-10-16
target/arm: Mask PMOVSR writes based on supported counters
Aaron Lindsay
2018-10-16
target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
Aaron Lindsay
2018-10-16
target/arm: Add the Cortex-A72
Edgar E. Iglesias
2018-10-16
target-arm: powerctl: Enable HVC when starting CPUs to EL2
Edgar E. Iglesias
2018-10-16
target/arm: Fix cortex-a7 id_isar0
Richard Henderson
2018-10-16
target/arm: Align cortex-r5 id_isar0
Richard Henderson
2018-10-16
target/arm: Define fields of ISAR registers
Richard Henderson
2018-10-16
target/arm: Fix aarch64_sve_change_el wrt EL0
Richard Henderson
2018-10-08
target/arm: Add v8M stack checks for MSR to SP_NS
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks for VLDM/VSTM
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks for Thumb push/pop
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks for T32 load/store single
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks for Thumb2 LDM/STM
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks for LDRD/STRD (imm)
Peter Maydell
2018-10-08
target/arm: Add v8M stack limit checks on NS function calls
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks on exception entry
Peter Maydell
2018-10-08
target/arm: Add some comments in Thumb decode
Peter Maydell
2018-10-08
target/arm: Add v8M stack checks on ADD/SUB/MOV of SP
Peter Maydell
2018-10-08
target/arm: Move v7m_using_psp() to internals.h
Peter Maydell
2018-10-08
target/arm: Define new EXCP type for v8M stack overflows
Peter Maydell
2018-10-08
target/arm: Define new TBFLAG for v8M stack checking
Peter Maydell
2018-10-08
target/arm: Pass TCGMemOpIdx to sve memory helpers
Richard Henderson
2018-10-08
target/arm: Rewrite vector gather first-fault loads
Richard Henderson
2018-10-08
target/arm: Rewrite vector gather stores
Richard Henderson
2018-10-08
target/arm: Rewrite vector gather loads
Richard Henderson
2018-10-08
target/arm: Split contiguous stores for endianness
Richard Henderson
2018-10-08
target/arm: Split contiguous loads for endianness
Richard Henderson
2018-10-08
target/arm: Rewrite helper_sve_st[1234]*_r
Richard Henderson
2018-10-08
target/arm: Rewrite helper_sve_ld[234]*_r
Richard Henderson
2018-10-08
target/arm: Rewrite helper_sve_ld1*_r using pages
Richard Henderson
2018-10-08
target/arm: Clear unused predicate bits for LD1RQ
Richard Henderson
2018-10-08
target/arm: Adjust aarch64_cpu_dump_state for system mode SVE
Richard Henderson
2018-10-08
target/arm: Handle SVE vector length changes in system mode
Richard Henderson
2018-10-08
target/arm: Pass in current_el to fp and sve_exception_el
Richard Henderson
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