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QEMU is a generic and open source machine & userspace emulator and virtualizer
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vfp.decode
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Commit message (
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Author
2021-06-21
target/arm: Don't NOCP fault for FPCXT_NS accesses
Peter Maydell
2021-06-03
target/arm: Implement scalar float32 to bfloat16 conversion
Richard Henderson
2020-12-10
target/arm: Implement VLDR/VSTR system register
Peter Maydell
2020-11-15
arm tcg cpus: Fix Lesser GPL version number
Chetan Pant
2020-09-01
target/arm: Implement VFP fp16 VMOV between gp and halfprec registers
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 VRINT*
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 VCVT between float and fixed-point
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 VCVT between float and integer
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 VLDR and VSTR
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 VCMP
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 for VMOV immediate
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 for fused-multiply-add
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL
Peter Maydell
2020-09-01
target/arm: Implement VFP fp16 for VFP_BINOP operations
Peter Maydell
2020-08-24
target/arm: Do M-profile NOCP checks early and via decodetree
Peter Maydell
2020-02-28
target/arm: Split VFM decode
Richard Henderson
2020-02-28
target/arm: Add formats for some vfp 2 and 3-register insns
Richard Henderson
2020-02-28
target/arm: Move VLLDM and VLSTM to vfp.decode
Richard Henderson
2019-06-17
target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm
Peter Maydell
2019-06-13
target/arm: Convert float-to-integer VCVT insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VCVT fp/fixed-point conversion insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VJCVT to decodetree
Peter Maydell
2019-06-13
target/arm: Convert integer-to-float insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert double-single precision conversion insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP round insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert the VCVT-to-f16 insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert the VCVT-from-f16 insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP comparison insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VMOV (register) to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VSQRT to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VNEG to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VABS to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VMOV (imm) to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP fused multiply-add insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VDIV to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VSUB to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VADD to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VNMUL to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VMUL to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VNMLA to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VNMLS to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VMLS to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VMLA to decodetree
Peter Maydell
2019-06-13
target/arm: Convert the VFP load/store multiple insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VLDR and VSTR to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP two-register transfer insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert "single-precision" register moves to decodetree
Peter Maydell
2019-06-13
target/arm: Convert "double-precision" register moves to decodetree
Peter Maydell
2019-06-13
target/arm: Add stubs for AArch32 VFP decodetree
Peter Maydell