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path: root/target/arm/vfp.decode
AgeCommit message (Expand)Author
2021-06-21target/arm: Don't NOCP fault for FPCXT_NS accessesPeter Maydell
2021-06-03target/arm: Implement scalar float32 to bfloat16 conversionRichard Henderson
2020-12-10target/arm: Implement VLDR/VSTR system registerPeter Maydell
2020-11-15arm tcg cpus: Fix Lesser GPL version numberChetan Pant
2020-09-01target/arm: Implement VFP fp16 VMOV between gp and halfprec registersPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VRINT*Peter Maydell
2020-09-01target/arm: Implement VFP fp16 VCVT between float and fixed-pointPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VCVT between float and integerPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VLDR and VSTRPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VCMPPeter Maydell
2020-09-01target/arm: Implement VFP fp16 for VMOV immediatePeter Maydell
2020-09-01target/arm: Implement VFP fp16 for VABS, VNEG, VSQRTPeter Maydell
2020-09-01target/arm: Implement VFP fp16 for fused-multiply-addPeter Maydell
2020-09-01target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMULPeter Maydell
2020-09-01target/arm: Implement VFP fp16 for VFP_BINOP operationsPeter Maydell
2020-08-24target/arm: Do M-profile NOCP checks early and via decodetreePeter Maydell
2020-02-28target/arm: Split VFM decodeRichard Henderson
2020-02-28target/arm: Add formats for some vfp 2 and 3-register insnsRichard Henderson
2020-02-28target/arm: Move VLLDM and VLSTM to vfp.decodeRichard Henderson
2019-06-17target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_immPeter Maydell
2019-06-13target/arm: Convert float-to-integer VCVT insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VCVT fp/fixed-point conversion insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VJCVT to decodetreePeter Maydell
2019-06-13target/arm: Convert integer-to-float insns to decodetreePeter Maydell
2019-06-13target/arm: Convert double-single precision conversion insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP round insns to decodetreePeter Maydell
2019-06-13target/arm: Convert the VCVT-to-f16 insns to decodetreePeter Maydell
2019-06-13target/arm: Convert the VCVT-from-f16 insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP comparison insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VMOV (register) to decodetreePeter Maydell
2019-06-13target/arm: Convert VSQRT to decodetreePeter Maydell
2019-06-13target/arm: Convert VNEG to decodetreePeter Maydell
2019-06-13target/arm: Convert VABS to decodetreePeter Maydell
2019-06-13target/arm: Convert VMOV (imm) to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP fused multiply-add insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VDIV to decodetreePeter Maydell
2019-06-13target/arm: Convert VSUB to decodetreePeter Maydell
2019-06-13target/arm: Convert VADD to decodetreePeter Maydell
2019-06-13target/arm: Convert VNMUL to decodetreePeter Maydell
2019-06-13target/arm: Convert VMUL to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP VNMLA to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP VNMLS to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP VMLS to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP VMLA to decodetreePeter Maydell
2019-06-13target/arm: Convert the VFP load/store multiple insns to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP VLDR and VSTR to decodetreePeter Maydell
2019-06-13target/arm: Convert VFP two-register transfer insns to decodetreePeter Maydell
2019-06-13target/arm: Convert "single-precision" register moves to decodetreePeter Maydell
2019-06-13target/arm: Convert "double-precision" register moves to decodetreePeter Maydell
2019-06-13target/arm: Add stubs for AArch32 VFP decodetreePeter Maydell