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QEMU is a generic and open source machine & userspace emulator and virtualizer
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arm
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translate-vfp.inc.c
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Author
2019-12-16
target/arm: Handle trapping to EL2 of AArch32 VMRS instructions
Marc Zyngier
2019-11-01
target/arm: Allow reading flags from FPSCR for M-profile
Christophe Lyon
2019-09-03
target/arm: Free TCG temps in trans_VMOV_64_sp()
Peter Maydell
2019-09-03
target/arm: Factor out unallocated_encoding for aarch32
Richard Henderson
2019-09-03
Revert "target/arm: Use unallocated_encoding for aarch32"
Richard Henderson
2019-08-16
target/arm: Use unallocated_encoding for aarch32
Richard Henderson
2019-08-16
target/arm: Replace offset with pc in gen_exception_insn
Richard Henderson
2019-08-16
target/arm: Introduce add_reg_for_lit
Richard Henderson
2019-07-04
target/arm: Correct VMOV_imm_dp handling of short vectors
Peter Maydell
2019-06-18
target/arm: Check for dp support for dp VFM, not sp
Peter Maydell
2019-06-17
target/arm: Only implement doubles if the FPU supports them
Peter Maydell
2019-06-17
target/arm: Fix typos in trans function prototypes
Peter Maydell
2019-06-17
target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm
Peter Maydell
2019-06-17
target/arm: Move vfp_expand_imm() to translate.[ch]
Peter Maydell
2019-06-13
target/arm: Fix short-vector increment behaviour
Peter Maydell
2019-06-13
target/arm: Convert float-to-integer VCVT insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VCVT fp/fixed-point conversion insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VJCVT to decodetree
Peter Maydell
2019-06-13
target/arm: Convert integer-to-float insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert double-single precision conversion insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP round insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert the VCVT-to-f16 insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert the VCVT-from-f16 insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP comparison insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VMOV (register) to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VSQRT to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VNEG to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VABS to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VMOV (imm) to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP fused multiply-add insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VDIV to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VSUB to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VADD to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VNMUL to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VMUL to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VNMLA to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VNMLS to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VMLS to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VMLA to decodetree
Peter Maydell
2019-06-13
target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0d
Peter Maydell
2019-06-13
target/arm: Convert the VFP load/store multiple insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP VLDR and VSTR to decodetree
Peter Maydell
2019-06-13
target/arm: Convert VFP two-register transfer insns to decodetree
Peter Maydell
2019-06-13
target/arm: Convert "single-precision" register moves to decodetree
Peter Maydell
2019-06-13
target/arm: Convert "double-precision" register moves to decodetree
Peter Maydell
2019-06-13
target/arm: Add helpers for VFP register loads and stores
Peter Maydell
2019-06-13
target/arm: Move the VFP trans_* functions to translate-vfp.inc.c
Peter Maydell
2019-06-13
target/arm: Convert the VSEL instructions to decodetree
Peter Maydell
2019-06-13
target/arm: Factor out VFP access checking code
Peter Maydell
2019-06-13
target/arm: Add stubs for AArch32 VFP decodetree
Peter Maydell