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path: root/target/arm/translate-a64.c
AgeCommit message (Expand)Author
2017-10-10tcg: remove addr argument from lookup_tb_ptrEmilio G. Cota
2017-09-21target/arm: Remove out of date ARM ARM section references in A64 decoderPeter Maydell
2017-09-14target/arm: Avoid an extra temporary for store_exclusiveRichard Henderson
2017-09-14AArch64: Fix single stepping of ERET instructionJaroslaw Pelczar
2017-09-06target/arm: [a64] Move page and ss checks to init_disas_contextRichard Henderson
2017-09-06target/arm: [tcg] Port to generic translation frameworkLluís Vilanova
2017-09-06target/arm: [tcg,a64] Port to disas_logLluís Vilanova
2017-09-06target/arm: [tcg,a64] Port to tb_stopLluís Vilanova
2017-09-06target/arm: [tcg,a64] Port to translate_insnLluís Vilanova
2017-09-06target/arm: [tcg,a64] Port to breakpoint_checkLluís Vilanova
2017-09-06target/arm: [tcg,a64] Port to insn_startLluís Vilanova
2017-09-06target/arm: [tcg,a64] Port to init_disas_contextLluís Vilanova
2017-09-06target/arm: [tcg] Port to DisasContextBaseLluís Vilanova
2017-09-06target/arm: Use DISAS_NORETURNRichard Henderson
2017-09-04target/arm: Fix aa64 ldp register writebackRichard Henderson
2017-08-15target/arm: Require alignment for load exclusiveAlistair Francis
2017-08-15target/arm: Correct load exclusive pair atomicityRichard Henderson
2017-08-15target/arm: Correct exclusive store cmpxchg memop maskAlistair Francis
2017-07-24target/arm: fix TCG temp leak in aarch64 rev16Emilio G. Cota
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-19target/arm: Optimize aarch64 rev16Richard Henderson
2017-07-17target/arm: use DISAS_EXIT for eret handlingAlex Bennée
2017-07-17target/arm: use gen_goto_tb for ISB handlingAlex Bennée
2017-07-17target/arm/translate: make DISAS_UPDATE match declared semanticsAlex Bennée
2017-06-19target/arm: Exit after clearing aarch64 interrupt maskRichard Henderson
2017-06-05target/aarch64: optimize indirect branchesEmilio G. Cota
2017-06-05target/aarch64: optimize cross-page direct jumps in softmmuEmilio G. Cota
2017-06-02arm: Add support for M profile CPUs having different MMU index semanticsPeter Maydell
2017-02-28Add missing fp_access_check() to aarch64 crypto instructionsNick Reilly
2017-02-24target-arm: don't generate WFE/YIELD calls for MTTCGAlex Bennée
2017-02-07target/arm: A32, T32: Create Instruction Syndromes for Data AbortsPeter Maydell
2017-01-13target/arm: Fix ubfx et al for aarch64Richard Henderson
2017-01-10target-arm: Use clrsb helperRichard Henderson
2017-01-10target-arm: Use clz opcodeRichard Henderson
2017-01-10target-arm: Use new deposit and extract opsRichard Henderson
2016-12-27target-arm: Fix aarch64 disas_ldst_single_structRichard Henderson
2016-12-27target-arm: Fix aarch64 vec_reg_offsetRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
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