| Age | Commit message (Expand) | Author |
|---|
| 2017-09-21 | target/arm: Remove out of date ARM ARM section references in A64 decoder | Peter Maydell |
| 2017-09-14 | target/arm: Avoid an extra temporary for store_exclusive | Richard Henderson |
| 2017-09-14 | AArch64: Fix single stepping of ERET instruction | Jaroslaw Pelczar |
| 2017-09-06 | target/arm: [a64] Move page and ss checks to init_disas_context | Richard Henderson |
| 2017-09-06 | target/arm: [tcg] Port to generic translation framework | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg,a64] Port to disas_log | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg,a64] Port to tb_stop | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg,a64] Port to translate_insn | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg,a64] Port to breakpoint_check | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg,a64] Port to insn_start | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg,a64] Port to init_disas_context | Lluís Vilanova |
| 2017-09-06 | target/arm: [tcg] Port to DisasContextBase | Lluís Vilanova |
| 2017-09-06 | target/arm: Use DISAS_NORETURN | Richard Henderson |
| 2017-09-04 | target/arm: Fix aa64 ldp register writeback | Richard Henderson |
| 2017-08-15 | target/arm: Require alignment for load exclusive | Alistair Francis |
| 2017-08-15 | target/arm: Correct load exclusive pair atomicity | Richard Henderson |
| 2017-08-15 | target/arm: Correct exclusive store cmpxchg memop mask | Alistair Francis |
| 2017-07-24 | target/arm: fix TCG temp leak in aarch64 rev16 | Emilio G. Cota |
| 2017-07-19 | tcg: Pass generic CPUState to gen_intermediate_code() | Lluís Vilanova |
| 2017-07-19 | target/arm: Optimize aarch64 rev16 | Richard Henderson |
| 2017-07-17 | target/arm: use DISAS_EXIT for eret handling | Alex Bennée |
| 2017-07-17 | target/arm: use gen_goto_tb for ISB handling | Alex Bennée |
| 2017-07-17 | target/arm/translate: make DISAS_UPDATE match declared semantics | Alex Bennée |
| 2017-06-19 | target/arm: Exit after clearing aarch64 interrupt mask | Richard Henderson |
| 2017-06-05 | target/aarch64: optimize indirect branches | Emilio G. Cota |
| 2017-06-05 | target/aarch64: optimize cross-page direct jumps in softmmu | Emilio G. Cota |
| 2017-06-02 | arm: Add support for M profile CPUs having different MMU index semantics | Peter Maydell |
| 2017-02-28 | Add missing fp_access_check() to aarch64 crypto instructions | Nick Reilly |
| 2017-02-24 | target-arm: don't generate WFE/YIELD calls for MTTCG | Alex Bennée |
| 2017-02-07 | target/arm: A32, T32: Create Instruction Syndromes for Data Aborts | Peter Maydell |
| 2017-01-13 | target/arm: Fix ubfx et al for aarch64 | Richard Henderson |
| 2017-01-10 | target-arm: Use clrsb helper | Richard Henderson |
| 2017-01-10 | target-arm: Use clz opcode | Richard Henderson |
| 2017-01-10 | target-arm: Use new deposit and extract ops | Richard Henderson |
| 2016-12-27 | target-arm: Fix aarch64 disas_ldst_single_struct | Richard Henderson |
| 2016-12-27 | target-arm: Fix aarch64 vec_reg_offset | Richard Henderson |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |
