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QEMU is a generic and open source machine & userspace emulator and virtualizer
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mve.decode
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Commit message (
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Author
2021-08-25
target/arm: Implement MVE interleaving loads/stores
Peter Maydell
2021-08-25
target/arm: Implement MVE scatter-gather immediate forms
Peter Maydell
2021-08-25
target/arm: Implement MVE scatter-gather insns
Peter Maydell
2021-08-25
target/arm: Implement MVE VPNOT
Peter Maydell
2021-08-25
target/arm: Implement MVE VMOV to/from 2 general-purpose registers
Peter Maydell
2021-08-25
target/arm: Implement MVE VMAXA, VMINA
Peter Maydell
2021-08-25
target/arm: Implement MVE VQABS, VQNEG
Peter Maydell
2021-08-25
target/arm: Implement MVE saturating doubling multiply accumulates
Peter Maydell
2021-08-25
target/arm: Implement MVE VMLA
Peter Maydell
2021-08-25
target/arm: Implement MVE VMLADAV and VMLSLDAV
Peter Maydell
2021-08-25
target/arm: Implement MVE narrowing moves
Peter Maydell
2021-08-25
target/arm: Implement MVE VABAV
Peter Maydell
2021-08-25
target/arm: Implement MVE integer min/max across vector
Peter Maydell
2021-08-25
target/arm: Move 'x' and 'a' bit definitions into vmlaldav formats
Peter Maydell
2021-08-25
target/arm: Implement MVE shift-by-scalar
Peter Maydell
2021-08-25
target/arm: Implement MVE VMLAS
Peter Maydell
2021-08-25
target/arm: Implement MVE VPSEL
Peter Maydell
2021-08-25
target/arm: Implement MVE integer vector-vs-scalar comparisons
Peter Maydell
2021-08-25
target/arm: Implement MVE integer vector comparisons
Peter Maydell
2021-08-25
target/arm: Implement MVE incrementing/decrementing dup insns
Peter Maydell
2021-08-25
target/arm: Implement MVE VMULL (polynomial)
Peter Maydell
2021-08-25
target/arm: Note that we handle VMOVL as a special case of VSHLL
Peter Maydell
2021-07-02
target/arm: Implement MVE VADDLV
Peter Maydell
2021-07-02
target/arm: Implement MVE VSHLC
Peter Maydell
2021-07-02
target/arm: Implement MVE saturating narrowing shifts
Peter Maydell
2021-07-02
target/arm: Implement MVE VSHRN, VRSHRN
Peter Maydell
2021-07-02
target/arm: Implement MVE VSRI, VSLI
Peter Maydell
2021-07-02
target/arm: Implement MVE VSHLL
Peter Maydell
2021-07-02
target/arm: Implement MVE vector shift right by immediate insns
Peter Maydell
2021-07-02
target/arm: Implement MVE vector shift left by immediate insns
Peter Maydell
2021-07-02
target/arm: Implement MVE logical immediate insns
Peter Maydell
2021-06-24
target/arm: Implement MVE VADDV
Peter Maydell
2021-06-24
target/arm: Implement MVE VHCADD
Peter Maydell
2021-06-24
target/arm: Implement MVE VCADD
Peter Maydell
2021-06-24
target/arm: Implement MVE VADC, VSBC
Peter Maydell
2021-06-24
target/arm: Implement MVE VRHADD
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMULL (vector)
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMLADH and VQRDMLADH
Peter Maydell
2021-06-24
target/arm: Implement MVE VRSHL
Peter Maydell
2021-06-24
target/arm: Implement MVE VSHL insn
Peter Maydell
2021-06-24
target/arm: Implement MVE VQRSHL
Peter Maydell
2021-06-24
target/arm: Implement MVE VQSHL (vector)
Peter Maydell
2021-06-24
target/arm: Implement MVE VQADD, VQSUB (vector)
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMULL scalar
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
Peter Maydell
2021-06-24
target/arm: Implement MVE VQADD and VQSUB
Peter Maydell
2021-06-24
target/arm: Implement MVE VPST
Peter Maydell
2021-06-24
target/arm: Implement MVE VBRSR
Peter Maydell
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