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AgeCommit message (Expand)Author
2021-08-25target/arm: Implement MVE interleaving loads/storesPeter Maydell
2021-08-25target/arm: Implement MVE scatter-gather immediate formsPeter Maydell
2021-08-25target/arm: Implement MVE scatter-gather insnsPeter Maydell
2021-08-25target/arm: Implement MVE VPNOTPeter Maydell
2021-08-25target/arm: Implement MVE VMOV to/from 2 general-purpose registersPeter Maydell
2021-08-25target/arm: Implement MVE VMAXA, VMINAPeter Maydell
2021-08-25target/arm: Implement MVE VQABS, VQNEGPeter Maydell
2021-08-25target/arm: Implement MVE saturating doubling multiply accumulatesPeter Maydell
2021-08-25target/arm: Implement MVE VMLAPeter Maydell
2021-08-25target/arm: Implement MVE VMLADAV and VMLSLDAVPeter Maydell
2021-08-25target/arm: Implement MVE narrowing movesPeter Maydell
2021-08-25target/arm: Implement MVE VABAVPeter Maydell
2021-08-25target/arm: Implement MVE integer min/max across vectorPeter Maydell
2021-08-25target/arm: Move 'x' and 'a' bit definitions into vmlaldav formatsPeter Maydell
2021-08-25target/arm: Implement MVE shift-by-scalarPeter Maydell
2021-08-25target/arm: Implement MVE VMLASPeter Maydell
2021-08-25target/arm: Implement MVE VPSELPeter Maydell
2021-08-25target/arm: Implement MVE integer vector-vs-scalar comparisonsPeter Maydell
2021-08-25target/arm: Implement MVE integer vector comparisonsPeter Maydell
2021-08-25target/arm: Implement MVE incrementing/decrementing dup insnsPeter Maydell
2021-08-25target/arm: Implement MVE VMULL (polynomial)Peter Maydell
2021-08-25target/arm: Note that we handle VMOVL as a special case of VSHLLPeter Maydell
2021-07-02target/arm: Implement MVE VADDLVPeter Maydell
2021-07-02target/arm: Implement MVE VSHLCPeter Maydell
2021-07-02target/arm: Implement MVE saturating narrowing shiftsPeter Maydell
2021-07-02target/arm: Implement MVE VSHRN, VRSHRNPeter Maydell
2021-07-02target/arm: Implement MVE VSRI, VSLIPeter Maydell
2021-07-02target/arm: Implement MVE VSHLLPeter Maydell
2021-07-02target/arm: Implement MVE vector shift right by immediate insnsPeter Maydell
2021-07-02target/arm: Implement MVE vector shift left by immediate insnsPeter Maydell
2021-07-02target/arm: Implement MVE logical immediate insnsPeter Maydell
2021-06-24target/arm: Implement MVE VADDVPeter Maydell
2021-06-24target/arm: Implement MVE VHCADDPeter Maydell
2021-06-24target/arm: Implement MVE VCADDPeter Maydell
2021-06-24target/arm: Implement MVE VADC, VSBCPeter Maydell
2021-06-24target/arm: Implement MVE VRHADDPeter Maydell
2021-06-24target/arm: Implement MVE VQDMULL (vector)Peter Maydell
2021-06-24target/arm: Implement MVE VQDMLSDH and VQRDMLSDHPeter Maydell
2021-06-24target/arm: Implement MVE VQDMLADH and VQRDMLADHPeter Maydell
2021-06-24target/arm: Implement MVE VRSHLPeter Maydell
2021-06-24target/arm: Implement MVE VSHL insnPeter Maydell
2021-06-24target/arm: Implement MVE VQRSHLPeter Maydell
2021-06-24target/arm: Implement MVE VQSHL (vector)Peter Maydell
2021-06-24target/arm: Implement MVE VQADD, VQSUB (vector)Peter Maydell
2021-06-24target/arm: Implement MVE VQDMULH, VQRDMULH (vector)Peter Maydell
2021-06-24target/arm: Implement MVE VQDMULL scalarPeter Maydell
2021-06-24target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)Peter Maydell
2021-06-24target/arm: Implement MVE VQADD and VQSUBPeter Maydell
2021-06-24target/arm: Implement MVE VPSTPeter Maydell
2021-06-24target/arm: Implement MVE VBRSRPeter Maydell