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path: root/target/arm/helper.c
AgeCommit message (Expand)Author
2023-12-19target/arm/helper: Propagate MDCR_EL2.HPMN into PMCR_EL0.NJean-Philippe Brucker
2023-12-19target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accelPhilippe Mathieu-Daudé
2023-12-19target/arm: Restrict TCG specific helpersPhilippe Mathieu-Daudé
2023-12-19target/arm: Don't implement *32_EL2 registers when EL1 is AArch64 onlyPeter Maydell
2023-11-27target/arm: Handle overflow in calculation of next timer tickPeter Maydell
2023-11-08target/arm: hide aliased MIDR from gdbstubAlex Bennée
2023-11-08target/arm: mark the 32bit alias of PAR when LPAE enabledAlex Bennée
2023-10-27target/arm: Move feature test functions to their own headerPeter Maydell
2023-10-19target/arm: Implement FEAT_HPMN0Peter Maydell
2023-10-19target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0Michal Orzel
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson
2023-09-21target/arm: Implement FEAT_MOPS enable bitsPeter Maydell
2023-09-21target/arm: Update user-mode ID reg mask valuesPeter Maydell
2023-09-08target/arm: Implement RMR_ELxRichard Henderson
2023-09-08target/arm: Add ID_AA64ISAR2_EL1Aaron Lindsay
2023-08-31target/arm: Apply access checks to neoverse-n1 special registersRichard Henderson
2023-08-31target/arm: Allow cpu to configure GM blocksizeRichard Henderson
2023-08-22target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASKJean-Philippe Brucker
2023-08-22target/arm/helper: Check SCR_EL3.{NSE, NS} encoding for AT instructionsJean-Philippe Brucker
2023-08-22target/arm: Pass security space rather than flag for AT instructionsJean-Philippe Brucker
2023-08-22target/arm: Skip granule protection checks for AT instructionsJean-Philippe Brucker
2023-08-22target/arm/helper: Fix tlbmask and tlbbits for TLBI VAE2*Jean-Philippe Brucker
2023-08-22target/arm: Adjust PAR_EL1.SH for Device and Normal-NC memory typesPeter Maydell
2023-08-22target/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_secstate()Peter Maydell
2023-08-22target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate()Peter Maydell
2023-07-25arm: spelling fixesMichael Tokarev
2023-07-06target/arm: Handle IC IVAU to improve compatibility with JITsJohn Högberg
2023-07-04target/arm: Add raw_writes ops for register whose write induce TLB maintenanceEric Auger
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson
2023-06-23target/arm: Implement GPC exceptionsRichard Henderson
2023-06-23target/arm: Introduce ARMSecuritySpaceRichard Henderson
2023-06-23target/arm: Add RME cpregsRichard Henderson
2023-06-23target/arm: SCR_EL3.NS may be RES1Richard Henderson
2023-06-23target/arm: Update SCR and HCR for RMERichard Henderson
2023-06-06target/arm: allow DC CVA[D]P in user mode emulationZhuojia Shen
2023-05-12target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size checkPeter Maydell
2023-03-06target/arm: Stub arm_hcr_el2_eff for m-profileRichard Henderson
2023-03-02target/arm: Restrict 'qapi-commands-machine.h' to system emulationPhilippe Mathieu-Daudé
2023-02-27target/arm: Move hflags code into the tcg directoryFabiano Rosas
2023-02-27target/arm: Wrap arm_rebuild_hflags calls with tcg_enabledFabiano Rosas
2023-02-16target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()Claudio Fontana
2023-02-16target/arm: wrap psci call with tcg_enabledClaudio Fontana
2023-02-16target/arm: rename handle_semihosting to tcg_handle_semihostingClaudio Fontana
2023-02-16target/arm: Constify ID_PFR1 on user emulationPhilippe Mathieu-Daudé
2023-02-03target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 trapsPeter Maydell
2023-02-03target/arm: Implement the HFGITR_EL2.ERET trapPeter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 48..63Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 18..47Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 12..17Peter Maydell
2023-02-03target/arm: Mark up sysregs for HFGITR bits 0..11Peter Maydell
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