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path: root/target/arm/helper.c
AgeCommit message (Expand)Author
2022-01-07target/arm: Add missing FEAT_TLBIOS instructionsIdan Horowitz
2021-12-15target/arm: Correct calculation of tlb range invalidate lengthPeter Maydell
2021-09-30target/arm: Move gdbstub related code out of helper.cPeter Maydell
2021-09-30target/arm: Fix coding style issues in gdbstub code in helper.cPeter Maydell
2021-09-21target/arm: Add TB flag for "MVE insns not predicated"Peter Maydell
2021-09-20arm: Move PMC register definitions to internals.hAlexander Graf
2021-09-13target/arm: Take an exception if PSTATE.IL is setPeter Maydell
2021-08-26target/arm: Do hflags rebuild in cpsr_write()Peter Maydell
2021-08-26target/arm: Implement HSTR.TJDBXPeter Maydell
2021-08-26target/arm: Implement HSTR.TTEEPeter Maydell
2021-08-25target/arm: Implement M-profile trapping on division by zeroPeter Maydell
2021-08-25target/arm: Re-indent sdiv and udiv helpersPeter Maydell
2021-07-27target/arm: Export aarch64_sve_zcr_get_valid_lenRichard Henderson
2021-07-27target/arm: Correctly bound length in sve_zcr_get_valid_lenRichard Henderson
2021-07-18target/arm: Fix offsets for TTBCRRichard Henderson
2021-07-09target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRinthnick@vmware.com
2021-05-25target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2Richard Henderson
2021-05-25target/arm: Add support for FEAT_TLBIOSRebecca Cran
2021-05-25target/arm: Add support for FEAT_TLBIRANGERebecca Cran
2021-05-10target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()Peter Maydell
2021-04-30target/arm: Add ALIGN_MEM to TBFLAG_ANYRichard Henderson
2021-04-30target/arm: Move mode specific TB flags to tb->cs_baseRichard Henderson
2021-04-30target/arm: Introduce CPUARMTBFlagsRichard Henderson
2021-04-30target/arm: Add wrapper macros for accessing tbflagsRichard Henderson
2021-04-30target/arm: Rename TBFLAG_ANY, PSTATE_SSRichard Henderson
2021-04-30target/arm: Rename TBFLAG_A32, SCTLR_BRichard Henderson
2021-04-06Revert "target/arm: Make number of counters in PMCR follow the CPU"Peter Maydell
2021-03-30target/arm: Make number of counters in PMCR follow the CPUPeter Maydell
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé
2021-03-05target/arm: Use TCF0 and TFSRE0 for unprivileged tag checksPeter Collingbourne
2021-03-05target/arm: Add support for FEAT_SSBS, Speculative Store Bypass SafeRebecca Cran
2021-02-11target/arm: Correctly initialize MDCR_EL2.HPMNDaniel Müller
2021-02-11target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstateRebecca Cran
2021-02-11target/arm: Add support for FEAT_DIT, Data Independent TimingRebecca Cran
2021-02-11target/arm: Fix SCR RES1 handlingMike Nawrocki
2021-02-05target/arm: do not use cc->do_interrupt for KVM directlyClaudio Fontana
2021-01-29target/arm: Replace magic value by MMU_DATA_LOAD definitionPhilippe Mathieu-Daudé
2021-01-29target/arm: Conditionalize DBGDIDRRichard Henderson
2021-01-29target/arm: Implement ID_PFR2Richard Henderson
2021-01-19target/arm: refactor vae1_tlbmask()Rémi Denis-Courmont
2021-01-19target/arm: Implement SCR_EL2.EEL2Rémi Denis-Courmont
2021-01-19target/arm: set HPFAR_EL2.NS on secure stage 2 faultsRémi Denis-Courmont
2021-01-19target/arm: secure stage 2 translation regimeRémi Denis-Courmont
2021-01-19target/arm: generalize 2-stage page-walk conditionRémi Denis-Courmont
2021-01-19target/arm: translate NS bit in page-walksRémi Denis-Courmont
2021-01-19target/arm: do S1_ptw_translate() before address space lookupRémi Denis-Courmont
2021-01-19target/arm: handle VMID change in secure stateRémi Denis-Courmont
2021-01-19target/arm: add ARMv8.4-SEL2 system registersRémi Denis-Courmont
2021-01-19target/arm: add MMU stage 1 for Secure EL2Rémi Denis-Courmont
2021-01-19target/arm: add 64-bit S-EL2 to EL exception tableRémi Denis-Courmont
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