slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2017-09-21	nvic: Support banked exceptions in acknowledge and complete	Peter Maydell
2017-09-21	nvic: Make set_pending and clear_pending take a secure parameter	Peter Maydell
2017-09-21	target/arm: Implement MSR/MRS access to NS banked registers	Peter Maydell
2017-09-14	target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()	Peter Maydell
2017-09-14	target/arm: Add and use defines for EXCRET constants	Peter Maydell
2017-09-14	target/arm: Remove unnecessary '\| 0xf0000000' from do_v7m_exception_exit()	Peter Maydell
2017-09-14	target/arm: Get PRECISERR and IBUSERR the right way round	Peter Maydell
2017-09-14	target/arm: Clear exclusive monitor on v7M reset, exception entry/exit	Peter Maydell
2017-09-07	target/arm: Implement BXNS, and banked stack pointers	Peter Maydell
2017-09-07	target/arm: Move regime_is_secure() to target/arm/internals.h	Peter Maydell
2017-09-07	target/arm: Make CFSR register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make MMFAR banked for v8M	Peter Maydell
2017-09-07	target/arm: Make CCR register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make MPU_CTRL register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make MPU_RNR register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M	Peter Maydell
2017-09-07	target/arm: Make VTOR register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make CONTROL register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make FAULTMASK register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make PRIMASK register banked for v8M	Peter Maydell
2017-09-07	target/arm: Make BASEPRI register banked for v8M	Peter Maydell
2017-09-07	target/arm: Add MMU indexes for secure v8M	Peter Maydell
2017-09-07	target/arm: Implement new PMSAv8 behaviour	Peter Maydell
2017-09-04	target/arm: Create and use new function arm_v7m_is_handler_mode()	Peter Maydell
2017-09-04	target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until needed	Peter Maydell
2017-09-04	target/arm: Don't store M profile PRIMASK and FAULTMASK in daif	Peter Maydell
2017-09-04	target/arm: Define and use XPSR bit masks	Peter Maydell
2017-09-04	target/arm: Fix outdated comment about exception exit	Peter Maydell
2017-09-04	target/arm: Consolidate PMSA handling in get_phys_addr()	Peter Maydell
2017-09-04	target/arm: Use MMUAccessType enum rather than int	Peter Maydell
2017-09-01	arm: replace cpu_arm_init() with cpu_generic_init()	Igor Mammedov
2017-07-31	target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset	Peter Maydell
2017-07-31	target/arm: Rename cp15.c6_rgnr to pmsav7.rnr	Peter Maydell
2017-07-31	target/arm: Don't allow guest to make System space executable for M profile	Peter Maydell
2017-07-31	target/arm: Don't do MPU lookups for addresses in M profile PPB region	Peter Maydell
2017-07-31	target/arm: Correct MPU trace handling of write vs execute	Peter Maydell
2017-07-11	target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode	Peter Maydell
2017-06-02	arm: Implement HFNMIENA support for M profile MPU	Peter Maydell
2017-06-02	arm: add MPU support to M profile CPUs	Michael Davidsaver
2017-06-02	armv7m: Classify faults as MemManage or BusFault	Michael Davidsaver
2017-06-02	armv7m: Implement M profile default memory map	Michael Davidsaver
2017-06-02	armv7m: Improve "-d mmu" tracing for PMSAv7 MPU	Michael Davidsaver
2017-06-02	arm: Remove unnecessary check on cpu->pmsav7_dregion	Peter Maydell
2017-06-02	arm: Don't let no-MPU PMSA cores write to SCTLR.M	Peter Maydell
2017-06-02	arm: Clean up handling of no-MPU PMSA CPUs	Peter Maydell
2017-06-02	arm: Use different ARMMMUIdx values for M profile	Peter Maydell
2017-06-02	arm: Add support for M profile CPUs having different MMU index semantics	Peter Maydell
2017-04-20	arm: Move excnames[] array into arm_log_exceptions()	Peter Maydell
2017-03-20	arm: Fix APSR writes via M profile MSR	Peter Maydell
2017-03-14	target/arm: implement armv8 PMUSERENR (user-mode enable bits)	Andrew Baumann