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QEMU is a generic and open source machine & userspace emulator and virtualizer
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helper.c
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Author
2017-10-12
target/arm: Implement secure function return
Peter Maydell
2017-10-12
target/arm: Implement BLXNS
Peter Maydell
2017-10-12
target/arm: Implement SG instruction
Peter Maydell
2017-10-06
target/arm: Implement security attribute lookups for memory accesses
Peter Maydell
2017-10-06
target/arm: Add v8M support to exception entry code
Peter Maydell
2017-10-06
target/arm: Add support for restoring v8M additional state context
Peter Maydell
2017-10-06
target/arm: Update excret sanity checks for v8M
Peter Maydell
2017-10-06
target/arm: Don't warn about exception return with PC low bit set for v8M
Peter Maydell
2017-10-06
target/arm: Warn about restoring to unaligned stack
Peter Maydell
2017-10-06
target/arm: Check for xPSR mismatch usage faults earlier for v8M
Peter Maydell
2017-10-06
target/arm: Restore SPSEL to correct CONTROL register on exception return
Peter Maydell
2017-10-06
target/arm: Restore security state on exception return
Peter Maydell
2017-10-06
target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode
Peter Maydell
2017-10-06
target/arm: Don't switch to target stack early in v7M exception return
Peter Maydell
2017-10-06
arm: Fix SMC reporting to EL2 when QEMU provides PSCI
Jan Kiszka
2017-09-21
nvic: Support banked exceptions in acknowledge and complete
Peter Maydell
2017-09-21
nvic: Make set_pending and clear_pending take a secure parameter
Peter Maydell
2017-09-21
target/arm: Implement MSR/MRS access to NS banked registers
Peter Maydell
2017-09-14
target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()
Peter Maydell
2017-09-14
target/arm: Add and use defines for EXCRET constants
Peter Maydell
2017-09-14
target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit()
Peter Maydell
2017-09-14
target/arm: Get PRECISERR and IBUSERR the right way round
Peter Maydell
2017-09-14
target/arm: Clear exclusive monitor on v7M reset, exception entry/exit
Peter Maydell
2017-09-07
target/arm: Implement BXNS, and banked stack pointers
Peter Maydell
2017-09-07
target/arm: Move regime_is_secure() to target/arm/internals.h
Peter Maydell
2017-09-07
target/arm: Make CFSR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MMFAR banked for v8M
Peter Maydell
2017-09-07
target/arm: Make CCR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_CTRL register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_RNR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M
Peter Maydell
2017-09-07
target/arm: Make VTOR register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make CONTROL register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make FAULTMASK register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make PRIMASK register banked for v8M
Peter Maydell
2017-09-07
target/arm: Make BASEPRI register banked for v8M
Peter Maydell
2017-09-07
target/arm: Add MMU indexes for secure v8M
Peter Maydell
2017-09-07
target/arm: Implement new PMSAv8 behaviour
Peter Maydell
2017-09-04
target/arm: Create and use new function arm_v7m_is_handler_mode()
Peter Maydell
2017-09-04
target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until needed
Peter Maydell
2017-09-04
target/arm: Don't store M profile PRIMASK and FAULTMASK in daif
Peter Maydell
2017-09-04
target/arm: Define and use XPSR bit masks
Peter Maydell
2017-09-04
target/arm: Fix outdated comment about exception exit
Peter Maydell
2017-09-04
target/arm: Consolidate PMSA handling in get_phys_addr()
Peter Maydell
2017-09-04
target/arm: Use MMUAccessType enum rather than int
Peter Maydell
2017-09-01
arm: replace cpu_arm_init() with cpu_generic_init()
Igor Mammedov
2017-07-31
target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset
Peter Maydell
2017-07-31
target/arm: Rename cp15.c6_rgnr to pmsav7.rnr
Peter Maydell
2017-07-31
target/arm: Don't allow guest to make System space executable for M profile
Peter Maydell
2017-07-31
target/arm: Don't do MPU lookups for addresses in M profile PPB region
Peter Maydell
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